• Title/Summary/Keyword: Parallel-circuit line

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Analysis of the electrostatic induction voltage and electromagnetic induction current on the Parallel Circuit in 765kV Double Circuit Transmission Line (765kV 2회선 송전선로를 765kV 및 345kV로 병행운전시 유도현상 예측)

  • Woo, J.W.;Shim, E.B.;Kwak, J.S.;Jeon, M.R.;Kim, K.I.;Kim, T.O.
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.169-171
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    • 2002
  • The western route of KEPCO's 765kV transmission line has been tentatively operating as 345kV voltage before commercial operation. After finishing the test operation of 765kV substation in 2002. KEPCO decided to operate the 765kV line for commercial operation. During the applying of 765kV voltage to the transmission line, double circuit transmission line will be operated with two voltage grades of 765kV and 345kV. Because the earthing switch is installed on both end of transmission line, we had estimated the electrostatic induction voltage and electromagnetic induction current before the line energizing in order to confirm the ratings of earthing switch. The induced voltage and current is very important for the maintenance of parallel circuit. This paper describes the simulation study of electrical phenomena such as electrostatic induction voltage from the parallel line and electromagnetic induction current from the parallel circuit. The transmission line model was developed by EMTP (Electro-Magnetic Transient Program).

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A Equivalent Circuit for Lossless 2-Port Using Inverter and Its Application (무 손실 2-포트 회로의 인버터를 사용한 등가회로 및 응용)

  • Yang, Seong-Sik;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.7
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    • pp.761-770
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    • 2008
  • Impedance or admittance inverter is a conceptual 2-port device frequently used in microwave filter design. In this paper, the equivalent circuit using inverter for general loss less 2-port circuit is presented. Our equivalent circuit can be directly and easily represented with z- or y-parameters compared with the conventional methods. Based on the representation, the derived results for various coupled lines such as parallel coupled line and anti-parallel coupled lines are compared ours. In addition, the results of other workers for improvement of the distortion in frequency response of microstrip coupled line filter are derived using our representation and compared. The proposed equivalent circuit shows the difference with conventional equivalent circuit so the conventional design method can not be applied to parallel coupled line filter with our representation. So in this paper the novel design method is proposed and we showed the method yields more accurate design results.

Fault Location Algorithms for the Line to Ground Fault of Parallel-Circuit Line in Power Systems (전력계통 송배전선로 2회선 1선지락사고 고장거리 검출 알고리즘)

  • 최면송;이승재;강상희;이한웅
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.52 no.1
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    • pp.29-35
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    • 2003
  • This paper presents a fault location algorithm when there are parallel circuits in power system networks. In transmission networks, a fault location method using the distribution factor of fault currents is introduced and in distribution networks a method using direct 3-phase circuit analysis is developed, because the distribution networks are unbalanced. The effect of parallel circuits in fault location is studied in this paper. The effect is important for the range of protecting zones of distance relay in transmission networks and fault location in distribution networks. The result of developed fault location algorithm shows high accuracy in the simulation that using the EMTP.

Lumped Element MMIC Direction Coupler Based on Parallel Coupled-Line Theory (평행 결합선로 이론에 근거한 MMIC 집중 소자형 방향성 결합기)

  • Kang Myung-Soo;Park Jun-Seok;Lee Jae-Hak;Kim Hyeong-Seok
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.11
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    • pp.577-582
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    • 2004
  • In this paper, lumped equivalent circuits for a conventional parallel directional coupler are proposed. This equivalent circuits only have self inductance and self capacitance, so we can design exact lumped equivalent circuit. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even- and odd-mode properties of parallel-coupled line. By using the derived design formula, we have designed the 3dB and 4.7dB MMIC couplers at the center frequency of 3.4GHz and 5.6GHz respectively. Measurements for the designed MMIC directional couplers show at 4dB and 5.2dB-coupling value at the center frequency of 3.4GHz and 5.6GHz. Excellent agreements between simulation results and measurement results on the designed directional couplers show the validity of this paper

Analysis of Induced Voltage on Telecommunication Line in Parallel Distribution System

  • Kim, Hyun-Soo;Rhee, Sang-Bong;Lee, Soon-Jeong;Kim, Chul-Hwan;Kim, Yoon Sang
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.726-732
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    • 2014
  • A current flowing through a distribution conductor produces induced voltage, which is harmful to a telecommunication line. Previous research on induced voltage has been focused on single-circuit lines in the distribution system. However, the double-circuit lines, referred to as parallel distribution lines, are widely used in distribution systems because they have significant economic and environmental advantages over single-circuit lines. Therefore, a study on the induced voltage in double-circuit lines is needed. This paper presents a method of calculating the induced voltage in a parallel distribution system using four-terminal parameters and vector analysis. The calculation method is verified by the Electromagnetic Transient Program (EMTP) simulation.

Design of a Rule-Based Solution Based on MFC for Inspection of the Hybrid Electronic Circuit Board (MFC 기반 하이브리드 전자보오드 검사를 위한 규칙기반 솔루션 설계)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.9
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    • pp.531-538
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    • 2005
  • This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

Equivalent Circuit Design of 2.4 GHz Band LTCC Bandpass Filters Using Multilayer Inter-Digital Resonators (적층 Inter-Digital 공진기를 이용한 2.4 GHz 대역 LTCC 대역통과 여파기의 등가회로 설계)

  • Sung Gyu-Je
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.1 s.92
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    • pp.78-83
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    • 2005
  • LTCC filters have been widely used to wireless terminals. They generally adopt the multilayer structure. Some of multilayer LTCC filters are made of symmetrical parallel-coupled lines and anti-symmetrical parallel-coupled lines to reduce the length of resonators. The equivalent circuit of parallel-coupled lines was analyzed and applied to bandpass filters using multilayer parallel-coupled line resonators. The three-pole bandpass filter with the center frequency of 2.45 GHz is designed by using the proposed equivalent circuit and the measured results have good agreement with the design results.

Lumped/Distributed Hybrid Element Directional Coupler with Reduced Size Based on Parallel Coupled-Line Theory (평형결합선로 이론을 이용한 소형화된 집중/분포소자 방향성 결합기)

  • 김영태;박준석;정명섭;임재봉
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.153-156
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    • 2002
  • In this paper, we have designed a small size lumped/distributed hybrid element directional coupler using parallel coupled-line theory. a hybrid lumped equivalent circuit for a conventional parallel directional coupler is proposed. The equivalent circuit and design formula for the presented lumped element coupler are derived based on the even- and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have extracted design parameters and designed the 3㏈ and 10㏈ small size lumped element directional couplers at the center frequency of 2Ghz. Excellent agreements between design theory and simulation on the designed directional couplers show the validity of this paper.

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Fault Location Algorithm in Parallel Transmission Line Using Zero Sequence Network (영상회로를 이용한 병행 송전선로에서의 고장점 추정 알고리즘)

  • Park, Hong-Kyu;Lee, Jae-Gyu;You, Seok-Ku
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.282-284
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    • 1999
  • This paper presents an accurate algorithm for fault location of a single phase to earth fault on a two-parallel transmission line using only one-terminal data. It is impossible to calculate the accurate fault distance, because of the unknown fault resistance and fault current at the fault point. The faulted line circuit and the zero-sequence circuit of two-parallel line are used as a fault location model, which the source impedance of the remote end is not involved. The algorithm can eliminate the effect of load flow and the fault resistance in calculating the fault location.

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Fault Location Algorithm for Parallel Transmission Line with a Teed Circuit (병행 2회선의 T분기 선로 고장점 표정 알고리즘)

  • Kwon, Young-Jin;Kang, Sang-Hee;Lee, Seeng-Jae
    • Proceedings of the KIEE Conference
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    • 2000.11a
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    • pp.49-51
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    • 2000
  • This paper presents a fault location algorithm for single-phase-to-ground faults on the teed circuit of a parallel transmission line. This algorithm uses only local end voltage and current information. Remote end and fault currents are calculated by using distribution factors. To reduce load current effect, negative sequence current is used. EMTP simulation result have shown effectiveness of the algorithm under various conditions.

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