• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.7A
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• pp.563-568
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• 2003

In this paper, a miniaturized parallel coupled bandpass filter using multi-layered LTCC(Low Temperature Co-fired Ceramics) substrate for SOP(System-On-Package) is proposed for applications to wireless communication systems. The fabricated BPF is composed of five 106${\mu}{\textrm}{m}$ thick LTCC layers and its size is 5.24mm x 4.3mm x 0.53 mm. The measured characteristics of the BPF show the center frequency of 5.8GHz, bandwidth of 200MHz, insertion loss of 2.326dB and return loss of 13.679dB. In addition, the attenuation is 28.052dB at 4.7GHz.

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.1
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• pp.1-6
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• 2014

Most of the previous algorithms focus on computing the convex hull for a set of points. In this paper, we present a method for approximating the convex hull for a set of spheres with various radii in discrete space. Computing the convex hull for a set of spheres is a base technology for many applications that study structural properties of molecules. We present a voxel map data structures, where the molecule is represented as a set of spheres, and corresponding algorithms. Based on CUDA programming for using the parallel architecture of GPU, our algorithm takes less than 40ms for computing the convex hull of 6,400 spheres in average.

• Proceedings of the KSRS Conference
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• v.1
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• pp.220-223
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• 2006

The COMS(Communication, Ocean and Meteorological Satellite) EPS(Electrical Power Subsystem) is derived from an enhanced Eurostar 3000 EPS which is fully autonomous operation in normal conditions or in the event of a failure and provides a high level of reconfiguration capability and flexibility. This paper introduces the COMS EPS preliminary design result. The COMS EPS consists of a battery, a solar array wing, a PSR(Power Supply Regulator), a PRU(Pyrotechnic Unit), a SADM(Solar Array Drive Mechanism) and relay and fuse brackets. This can offer a bus power capability of 3 kW. The solar array is made of a deployable wing with two panels. One type of solar cells is selected as GaAs/Ge triple junction cells. Li-ion battery is base lined with ten series cell module of five cells in parallel. PSR associated with battery and solar array generates a power bus fully regulated 50 V. Power bus is centralised protection and distribution by relay and fuse brackets. PRU provides power for firing actuators devices. The solar array wing is routed by the SADM under control of the AOCS(Attitude Orbit Control Subsystem). The control and monitoring of the EPS especially of the battery, is performed by the PSR in combination with on-board software.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.186-194
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• 1996

The SliM (sliding memory plane) array processor has been proposed to alleviate disadvantages of existing mesh-connected SIMD(single instruction stream- multiple data streams) array processors, such as the inter-PE(processing element) communication overhead, the data I/O overhead and complicated interconnections. This paper presents the deisgn and implementation of SliM image processor ASIC (application specific integrated circuit) chip consisting of mesh connected 5 X 5 PE. The PE architecture implemented here is quite different from the originally proposed PE. We have performed the front-end design, such as VHDL (VHSIC hardware description language)modeling, logic synthesis and simulation, and have doen the back-end design procedure. The SliM ASIC chip used the VTI 0.8$\mu$m standard cell library (v8r4.4) has 55,255 gates and twenty-five 128 X 9 bit SRAM modules. The chip has the 326.71 X 313.24mil$^{2}$ die size and is packed using the 144 pin MQFP. The chip operates perfectly at 25 MHz and gives 625 MIPS. For performance evaluation, we developed parallel algorithms and the performance results showed improvement compared with existing image processors.

• Journal of IKEEE
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• v.20 no.4
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• pp.385-391
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• 2016

We demonstrated experimentally a variable optical frequency comb source using a cascaded dual parallel Mach Zehnder modulator (DPMZM) and a phase modulator (PM). With this simple configuration and applying low drive voltages, we generated variable comb source composed of spectral lines 3, 5, 7, 9 and 11 with 10-GHz frequency spacing, also generated 2 and 3 spectral lines with 20 GHz frequency spacing. The generated comb source maintains high spectral coherence across the entire bandwidth with good spectral flatness (within 1-dB for 2, 3, 5, 7 comb lines, within 2-dB for 9-comb lines and within 3-dB for 11 comb lines). The flat and variable comb source is mainly achieved by manipulating 6 operating parameters of DPMZM, setting RF amplifier gain, connected at phase modulator and phase shifters. Hence the method is simple and offers great flexibility in achieving flat and variable comb spectrum, which is experimentally demonstrated. This brings advantages of power efficiency due to low driving voltages, simplicity and cost effectiveness to the system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.61-67
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• 2004

The next generation cellular wireless communication systems require high data rate transmissions and large system capacities. In order to meet these requirements, multiple antennas can be used at the base and mobile stations, forming MIMO(Multiple Input Multiple Output) channels. This paper proposes a MIMO SDMA(Space Division Multiple Access) technique with dynamic slot allocation which allows the transmitter to efficiently transmit parallel data streams to each of multiple receivers. The proposed technique can increase system capacities significantly by transmitting a larger number of data streams than conventional MIMO techniques while minimizing the performance degradation due to the beamforming dimension reduction.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.5
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• pp.1089-1094
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• 2003

Recently, Software development method supported CBD is applied with many concern and is researched with part of application and composition based-on architecture effectively use it. Effectively, C2 architecture has been concern with the point of component composition method based-on message driven for supported GUI. But, In case of classified sequence in component and method call method in server component, component must be modified to apply it. Thus, In this paper, Message handling part with a part of C2 architecture change is locate in the message neither component not connector. So, Although method call method it can be composit and operate component for support Plug-and-Play without modification. Also, it's possible the more flexible message handling with parallel composition of component between message without classified sequence.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.280-283
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• 2000

Users of computer interfaced with the LAN use the same printer with time sharing. Alternatively, Hey use the multi-user printer interface to print in the office which can't have LAN system due to the great expenses. Otherwise they have to connect directly moving the printer to computer. In this papaer, we present a new printer interface equipment which can interface a printer and multi computers through wireless using the radio frequency of about 430MHz. The tranceivers of the equipment consist of two part: one part is installed in parallel port of computer and other part is installed in Centronix port of printer. Their maximum data rate is 9600bps and the communication area is about 50 meters in best case.

• Journal of information and communication convergence engineering
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• v.13 no.3
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• pp.145-151
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• 2015

We describe in this paper a hardware-based improvement scheme of a real-time automatic speech recognition (ASR) system with respect to speed by designing a parallel feature extraction algorithm on a Field-Programmable Gate Array (FPGA). A computationally intensive block in the algorithm is identified implemented in hardware logic on the FPGA. One such block is mel-frequency cepstrum coefficient (MFCC) algorithm used for feature extraction process. We demonstrate that the FPGA platform may perform efficient feature extraction computation in the speech recognition system as compared to the generalpurpose CPU including the ARM processor. The Xilinx Zynq-7000 System on Chip (SoC) platform is used for the MFCC implementation. From this implementation described in this paper, we confirmed that the FPGA platform is approximately 500× faster than a sequential CPU implementation and 60× faster than a sequential ARM implementation. We thus verified that a parallelized and optimized MFCC architecture on the FPGA platform may significantly improve the execution time of an ASR system, compared to the CPU and ARM platforms.

• Journal of information and communication convergence engineering
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• v.7 no.2
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• pp.235-240
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• 2009

This paper combines various detection techniques and analyzes their performances in detecting the transmission information of the D-STTD scheme that uses, in parallel, the STTD scheme known as the Alamouti code. The D-STTD scheme adopts one of the STTD schemes for transmission to acquire diverse effects and uses another form of STTD for multiplexing effects. Due to the multiplexing effect that transmits different data, it is difficult to apply D-STTD to the conventional STTD combining technique. This paper combines the D-STTD system with linear algorithm, SIC algorithm and OSIC algorithm known as multiplexing detection scheme based on MMSE scheme. And we propose the detection scheme of the D-STTD using MAP algorithm and analyze the performance of each system. The simulation results showed that the detector using iterative algorithm has better performance than Linear MMSE Detector. Especially, we can show that the detector using MAP algorithm outperforms conventional detector.