• Title/Summary/Keyword: Parallel Circuit

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A Study on the Modularization of LED Driver for Illumination Using a Fly-Back Converter (플라이백 컨버터를 이용한 조명용 LED Driver의 모듈화 연구)

  • Choi, Jin-Bong;Kim, Kwan-Woo;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.6
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    • pp.504-513
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    • 2009
  • This paper proposes the new type LED driver modularization for illumination LED driver. The proposed LED driver circuit insulates a hot GND of AC input power and a cold GND of LED driver part by using a fly-back converter. In order to control easily the current of the LED, the fly-back converter is operated in the discontinuous mode with excellent dynamic characteristics, and the characteristics of the LED are verified after the closed loop control is performed using a KIA2431. The LED driver module allows the wide AC power input ranges and realizes the burst dimming function which directly regulates a PWM control IC. This paper describes the operation principle of the LED driver module and it is proved the usefulness through the real model with experimentation. Besides, this paper proposes the multi-channel LED driver which the miniaturized and modularized LED driver module are connected by parallel, and verified its propriety by experiments.

SHA-1 Pipeline Configuration According to the Maximum Critical Path Delay (최대 임계 지연 크기에 따른 SHA-1 파이프라인 구성)

  • Lee, Je-Hoon;Choi, Gyu-Man
    • Convergence Security Journal
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    • v.16 no.7
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    • pp.113-120
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    • 2016
  • This paper presents a new high-speed SHA-1 pipeline architecture having a computation delay close to the maximum critical path delay of the original SHA-1. The typical SHA-1 pipelines are based on either a hash operation or unfolded hash operations. Their throughputs are greatly enhanced by the parallel processing in the pipeline, but the maximum critical path delay will be increased in comparison with the unfolding of all hash operations in each round. The pipeline stage logics in the proposed SHA-1 has the latency is similar with the result of dividing the maximum threshold delay of a round by the number of iterations. Experimental results show that the proposed SHA-1 pipeline structure is 0.99 and 1.62 at the operating speed ratio according to circuit size, which is superior to the conventional structure. The proposed pipeline architecture is expected to be applicable to various cryptographic and signal processing circuits with iterative operations.

Comparison of Fault Current Limiting Characteristics between the separated Three-phase Flux-lock Type SFCL and the Integrated Three-phase Flux-lock Type SFCL (분리된 삼상 자속구속형 전류제한기와 일체화된 삼상 자속구속형 전류제한기의 전류제한 특성 비교)

  • Doo, Seung-Gyu;Du, Ho-Ik;Kim, Min-Ju;Park, Chung-Ryul;Kim, Yong-Jin;Lee, Dong-Hyeok;Han, Byoung-Sung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.8
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    • pp.689-693
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    • 2009
  • We investigate the comparison of fault current characteristics between the separates three-phase flux-lock type superconducting fault current limiter(SFCL) and integrated three-phase flux-lock type superconducting fault current limiter(SFCL). The single-phase flux-lock type SFCL consists of two coils. The primary coil is wound in parallel to the secondary coil on an iron core and superconducting elements are connected to secondary coil in series. Superconducting elements are used by the YBCO coated conductor. The separated three-phase flux-lock type SFCL consists of single-phase flux-phase type SFCL in each phase. But the integrated three-phase flux-lock type SFCL consists of three-phase flux-reactors wound on an iron core. Flux-reactor consists of the same turn's ratio between coil 1 and coil 2 for each single phase. To compare the current limiting characteristics of the separated three-phase flux-lock type SFCL and integrated three-phase flux-lock type SFCL, the short circuit experiments are carried out fault condition such as the single line-to-ground fault. The experimental result shows that fault current limiting characteristic of the separated three-phase flux-lock type SFCL was better than integrated three-phase flux-lock type SFCL. And the integrated three-phase flux-lock type SFCL has an effect on sound phase.

Analysis of a.c. Characteristics in ZnO-Bi2O3Cr2O3 Varistor using Dielectric Functions (유전함수를 이용한 ZnO-Bi2O3Cr2O3 바리스터의 a.c. 특성 분석)

  • Hong, Youn-Woo;Shin, Hyo-Soon;Yeo, Dong-Hun;Kim, Jin-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.5
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    • pp.368-373
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    • 2010
  • In this study, we have investigated the effects of Cr dopant on the bulk trap levels and grain boundary characteristics of $Bi_2O_3$-based ZnO (ZB) varistor using admittance spectroscopy and dielectric functions (such as $Z^*,\;Y^*,\;M^*,\;{\varepsilon}^*$, and $tan{\delta}$). Admittance spectra show more than two bulk traps of $Zn_i$ and $V_o$ probably in different ionization states in ZnO-$Bi_2O_3-Cr_2O_3$ (ZBCr) system. Three kinds of temperature-dependant activation energies ($E_{bt}'s$) were calculated as 0.11~0.14 eV of attractive coulombic center, 0.16~0.17 eV of $Zn_{\ddot{i}}$, and 0.33 eV of $V_o^{\cdot}$ as dominant bulk defects. The grain boundaries of ZBCr could be electrochemically divided into two types as a sensitive to ambient oxygen i.e. electrically active one and an oxygen-insensitive i.e. electrically inactive one. The grain boundaries were electrically single type under 460 K (equivalent circuit as parallel $R_{gb1}C_{gb1}$) but separated as double one ($R_{gb1}C_{gb1}-R_{gb2}C_{gb2}$) over 480 K. It is revealed that the dielectric functions are very useful tool to separate the overlapped bulk defect levels and to characterize the electrical properties of grain boundaries.

Implementation of 1.5Gbps Serial ATA (1.5Gbps 직렬 에이티에이 전송 칩 구현)

  • 박상봉;허정화;신영호;홍성혁;박노경
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.7
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    • pp.63-70
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    • 2004
  • This paper describes the link layer and physical layer of the Serial ATA which is the next generation for parallel ATA specification that defines data transfer between PC and peripheral storage devices. The link layer consists of CRC generation/error detection, 8b/10b decoding/encoding, primitive generation/detection block. For the physical layer, it includes CDR(Cock Data Recovery), transmission PLL, serializer/de-serializer. It also includes generation and receipt of OOB(Out-Of-Band) signal, impedance calibration, squelch circuit and comma detection/generation. Additionally, this chip includes TCB(Test Control Block) and BIST(Built-In Selt Test) block to ease debugging and verification. It is fabricated with 0.18${\mu}{\textrm}{m}$ standard CMOS cell library. All the function of the link layer operate properly. For the physical layer, all the blocks operate properly but the data transfer is limited to the 1.28Gbps. This is doe to the affection or parasitic elements and is verified with SPICE simulation.

Stacked LTCC Band-Pass Filter for IEEE 802.11a (IEEE 802.11a용 적층형 LTCC 대역통과 여파기)

  • Lee Yun-Bok;Kim Ho-Yong;Lee Hong-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.2 s.93
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    • pp.154-160
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    • 2005
  • Microwave Otters are essential device in modem wireless systems. A compact dimension BPF(Band-pass Filter) for IEEE 802.11a WLAN service is realized using LTCC multi-layer process. To extrude 2-stage band-pass equivalent circuit, band-pass and J-inverter transform applied to Chebyshev low-pass prototype filter. Because parallel L-C resonator is complicate and hard to control the inductor characteristics in high frequency, the shorted $\lambda/4$ stripline is selected for the resonator structure. The passive element is located in the different layers connected by conventional via structure and isolated by inner GND. The dimension of fabricated stacked band-pass filter which is composed of six layers, is $2.51\times2.27\times1.02\;mm^3$. The measured filter characteristics show the insertion loss of -2.25 dB, half-power bandwidth of 220 MHz, attenuation at 5.7 GHz of -32.25 dB and group delay of 0.9 ns at 5.25 GHz.

A Study on the Design of Dual-Band Mixer for WLAN 802.11a/b/g Applications (802.11a/b/g WLAN용 이중대역 혼합기 설계에 관한 연구)

  • Park Wook-Ki;Go Min-Ho;Kang Suk-Youb;Park Hyo-Dal
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.11 s.102
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    • pp.1106-1113
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    • 2005
  • This paper presents a dual-band mixer for multi-standards of IEEE 802.1la/b/g using a single local oscillator, so as to improve the defects of legacy systems. Those systems have duplicate local oscillators and mixers to handle dual band signals, increasing complexity of system and power loss. The proposed circuit shows 11.6 dB, 16.8 dB of conversion loss and 8.77 dBm, 12.5 dBm of IIP3(Input 3rd Intercept Point) for respective bands when the two RF inputs of 2.452 and 5.260 GHz are down-converted to the identical 356 MHz If frequency. The RF-LO isolations are measured 36 dB, 41 dB at each frequencies and over 50 dB of LO-IF isolations are achieved at all cases.

Implementation of High-Quality Si Integrated Passive Devices using Thick Oxidation/Cu-BCB Process and Their RF Performance (실리콘 산화후막 공정과 Cu-BCB 공정을 이용한 고성능 수동 집적회로의 구현과 성능 측정)

  • 김동욱;정인호
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.5
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    • pp.509-516
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    • 2004
  • High-performance Si integrated passive process was developed using thick oxidation process and Cu-BCB process. This passive process leads to low-cost and high-quality RF module with a small form factor. The fabricated spiral inductor with 225 um inner diameter and 2.5 turns showed the inductance of 2.7 nH and the quality factor more than 30 in the frequency region of 1 ㎓ and above. Also WLCSP-type integrated passive devices were fabricated using the high-performance spiral inductors. The fabricated low pass filter had a parallel-resonance circuit inside the spiral inductor to suppress 2nd harmonics and showed about 0.5 ㏈ insertion loss at 2.45 ㎓. And also the high/low-pass balun had the insertion loss less than 0.5 ㏈ and the phase difference of 182 degrees at 2.45 ㎓.

The Analysis of Dual Resonant Iris for Designing Waveguide Band-Pass Filter (대역 통과 도파관 여파기 설계를 위한 이중 공진 아이리스 해석)

  • Choi, Jin-Young;Kim, Byung-Mun;Cho, Young-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.9
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    • pp.904-911
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    • 2011
  • This paper deals with transmission characteristics of a new dual resonant structure for designing waveguide band-pass filter. The structure which has a pass-band between two adjacent stop-bands in a single body consists of circular ridged aperture and four armed conducting patch. The dual resonant behavior of the structure can be represented by a combination of LC series and parallel resonant circuits. Also these resonant properties can be easily controlled by varying the geometry of the aperture and four armed conducting patch. Actually, the structure is fabricated on the microstrip substrate by use of etching technique so that it is formed an iris type resonator which can be easily put into the transverse plane of the waveguide. We use WR-90 standard waveguide, adapters, and VNA(vector network analyzer) to measure the resonant characteristics of the structure. It is very useful to design and to improve the cutoff skirts characteristics in the waveguide band-pass filter design area.

Fundamental Study of Energy Harvesting using Thermoelectric Module on Road Facilities (열전소자를 활용한 도로구조물에서의 에너지 하베스팅 기초 연구)

  • Lee, Jae-Jun;Kim, Dae-Hoon;Lee, Kang-Hwi;Lim, Jae-Kyu;Lee, Seung-Tae
    • International Journal of Highway Engineering
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    • v.16 no.6
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    • pp.51-57
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    • 2014
  • PURPOSES : An conventional method for electric power generation is converting thermal energy into mechanical energy then to electrical energy. Due to environmental issues such as global warming related with $CO_2$ emission etc., were the limiting factor for the energy resources which resulting in extensive research and novel technologies are required to generate electric power. Thermal energy harvesting using thermoelectric generator is one of energy harvesting technologies due to diverse advantages for new green technology. This paper presents a possibility of application of the thermoelectric generator's application in the direct exchange of waste solar energy into electrical power in road space. METHODS : To measure generated electric power of the thermoelectric generator, data logger was adopted as function of experimental factors such as using cooling sink, connection methods etc. Also, the thermoelectric generator、s behavior at low ambient temperature was investigated as measurement of output voltage vs. elapsed times. RESULTS : A few temperature difference between top an bottom of the thermoelectric generator is generated electric voltage. Components of an electrical circuit can be connected in various ways. The two simplest of these are called series and parallel and occur so open. Series shows slightly better performance in this study. An installation of cooling sink in the thermoelectric generator system was enhanced the output of power voltage. CONCLUSIONS : In this paper, a basic concepts of thermoelectric power generation is presented and applications of the thermoelectric generator to waste solar energy in road is estimated for green energy harvesting technology. The possibility of usage of thermoelectric technology for road facilities was found under the ambient thermal gradient between two surfaces of the thermoelectric module. An experiment results provide a testimony of the feasibility of the proposed environmental energy harvesting technology on the road facilities.