• Title/Summary/Keyword: Packaging cost

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10Gbps Optical Receiver Module using a novel TO Package (TO 패키지를 사용한 10Gbps 광수신기 모듈)

  • 구자남;조성문;송일종;장동훈;윤응률;원종화
    • Proceedings of the Optical Society of Korea Conference
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    • 2002.11a
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    • pp.184-185
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    • 2002
  • We discussed the main issues of 10GHz Receiver packaging. High frequency structure simulations and circuit simulations for TO-CANs led to a new design for 10GHz optical receiver module packaging. The simulation results were compared to the measured laboratory data. The proposed package has low cost and easy manufacture process far mass production. Using this package, we had a good optical to electrical conversion (OE) characteristic at a data rate of 10Gbps.

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Design Procedure for System in Package (SIP) Business

  • Kwon, Heung-Kyu
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.09a
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    • pp.109-119
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    • 2003
  • o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).

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Design and Fabrication of Low Temperature Processed $BaTiO_3$ Embedded Capacitor for Low Cost Organic System-on-Package (SOP) Applications (저가형 유기 SOP 적용을 위한 저온 공정의 $BaTiO_3$ 임베디드 커페시터 설계 및 제작)

  • Lee, Seung-J.;Park, Jae-Y.;Ko, Yeong-J.
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1587-1588
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    • 2006
  • Tn this paper, PCB (Printed Circuit Board) embedded $BaTiO_3$ MIM capacitors were designed, fabricated, and characterized for low cost organic SOP applications by using 3-D EM simulator and low temperature processes. Size of electrodes and thickness of high dielectric films are optimized for improving the performance characteristics of the proposed embedded MIM capacitors at high frequency regime. The selected thicknesses of the $BaTiO_3$ film are $12{\mu}m$, $16{\mu}m$, and $20{\mu}m$. The fabricated MIM capacitor with dielectric constant of 30 and thickness of $12{\mu}m$ has capacitance density of $21.5p\;F/mm^2$ at 100MHz, maximum quality factor of 37.4 at 300 MHz, a quality factor of 30.9 at 1GHz, self resonant frequency of 5.4 GHz, respectively. The measured capacitances and quality factors are well matched with 3-D EM simulated ones. These embedded capacitors are promising for SOP based advanced electronic systems with various functionality, low cost, small size and volume.

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Leadframe SiP with Conformal Shield

  • Kim, ByongJin;Sim, KiDong;Hong, SeoungJoon;Moon, DaeHo;Son, YongHo;Kang, DaeByoung;Khim, JinYoung;Yoon, JuHoon
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.4
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    • pp.31-34
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    • 2016
  • System In Package (SiP) is getting popular and momentum for the recent wearable, IoT and connectivity application apart from mobile phone. This is driven by market demands of cost competitive, lighter and smaller/thinner and higher performance. As one of many semiconducting assembly products, Leadframe product has been widely used for low cost solution, light/ small and thin form factor. But It has not been applied for SiP although Leadframe product has many advantages in cost, size and reliability performance. SiP is mostly based on laminate substrate and technically difficult on Leadframe substrate because of a limitation in SMT performance. In this paper, Leadframe based SiP product has been evaluated about key technical challenges in SMT performance and electrical shield technology. Mostly Leadframe is considered not available to apply EMI shield because of tie-bar around package edge. In order to overcome two major challenges, connection bars were deployed properly for SMT pad to pad and additional back-side etching was implemented after molding process to achieve electrical isolation from outer shield coating. This product was confirmed assembly workability as well as reliability.

A Study on Automotive LED Business Strategy Based on IP-R&D : Focused on Flip-Chip CSP (Chip-Scale Packaging) (IP-R&D를 통한 자동차분야 LED사업전략에 관한 연구 : Flip-Chip을 채용한 CSP (Chip-Scale Packaging) 기술을 중심으로)

  • Ryu, Chang Han;Choi, Yong Kyu;Suh, Min Suk
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.3
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    • pp.13-22
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    • 2015
  • LED (Light Emitting Diode) lighting is gaining more and more market penetration as one of the global warming countermeasures. LED is the next generation of fusion source composed of epi/chip/packaging of semiconductor process technology and optical/information/communication technology. LED has been applied to the existing industry areas, for example, automobiles, TVs, smartphones, laptops, refrigerators and street lamps. Therefore, LED makers have been striving to achieve the leading position in the global competition through development of core source technologies even before the promotion and adoption of LED technology as the next generation growth engine with eco-friendly characteristics. However, there has been a point of view on the cost compared to conventional lighting as a large obstacle to market penetration of LED. Therefore, companies are developing a Chip-Scale Packaging (CSP) LED technology to improve performance and reduce manufacturing costs. In this study, we perform patent analysis associated with Flip-Chip CSP LED and flow chart for promising technology forecasting. Based on our analysis, we select key patents and key patent players to derive the business strategy for the business success of Flip-Chip CSP PKG LED products.

Overview on Flip Chip Technology for RF Application (RF 응용을 위한 플립칩 기술)

  • 이영민
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.61-71
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    • 1999
  • The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.

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Low Cost and High Sensitivity Flexible Pressure Sensor Based on Graphite Paste through Lamination after O2 Plasma Surface Treatment Process (O2 플라즈마 표면 처리 공정 후 라미네이션 공정으로 제작된 흑연 페이스트 기반의 저비용 및 고감도 유연 압력 센서)

  • Nam, Hyun Jin;Kang, Cheol;Lee, Seung-Woo;Kim, Sun Woo;Park, Se-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.29 no.4
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    • pp.21-27
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    • 2022
  • Flexible pressure sensor was developed using low-cost conductive graphite as printed electronics. Flexible pressure sensors are attracting attention as materials to be used in future industries such as medical, games, and AI. As a result of evaluating various electromechanical properties of the printed electrode for flexible pressure sensors, it showed a constant resistance change rate in a maximum tensile rate of 20%, 30° tension/bending, and a simple pulse test. A more appropriate matrix pattern was designed by simulating the electrodes for which this verification was completed. Utilizing the Serpentine pattern, we utilized a process that allows simultaneous fabrication and encapsulation of the matrix pattern. One side of the printed graphite electrode was O2 plasma surface treated to increase adhesive strength, rotated 90 times, and two electrodes were made into one through a lamination process. As a result of pasting the matrix pattern prepared in this way to the wrist pulse position of the human body and proceeding with the actual measurement, a constant rate of resistance change was shown regardless of gender.

Effect of Modified Atmosphere Packaging and Vacuum Packaging on Quality Characteristics of Low Grade Beef during Cold Storage

  • Hur, S.J.;Jin, S.K.;Park, J.H.;Jung, S.W.;Lyu, H.J.
    • Asian-Australasian Journal of Animal Sciences
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    • v.26 no.12
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    • pp.1781-1789
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    • 2013
  • Many studies have been carried out with respect to packaging methods and temperature conditions of beef. However, the effects of packaging methods and temperature conditions on the quality characteristics have not been extensively studied in low-grade beef. Low-grade beef samples were divided into 3 groups (C: ziplock bag packaging, T1: vacuum packaging, and T2: modified atmosphere packaging (MAP), $CO_2/N_2$ = 3:7) and samples were stored at $4^{\circ}C$ for 21 days. The water-holding capacity (WHC) was significantly lower in T1 than in the other samples up to 14 days of storage. The thiobarbituric acid reactive substances and volatile basic nitrogen values were significantly lower in T1 and T2 than in C after 7 to 14 days of storage. The total bacterial counts were significantly lower in T1 and T2 than in C after 14 days of storage. In a sensory evaluation, tenderness and overall acceptability were significantly higher in T1 and T2 than in C at the end of the storage period (21 days). We propose that the MAP method can improve beef quality characteristics of low-grade beef during cold storage. However, the beneficial effects did not outweigh the cost increase to implement MAP.

Recent Trends in Development of Ag Nanowire-based Transparent Electrodes for Flexible·Stretchable Electronics (유연·신축성 전자 소자 개발을 위한 은 나노와이어 기반 투명전극 기술)

  • Kim, Dae-Gon;Kim, Youngmin;Kim, Jong-Woong
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.1
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    • pp.7-14
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    • 2015
  • Recently, advances in nano-material researches have opened the door for various transparent conductive materials, which include carbon nanotube, graphene, Ag and Cu nanowire, and printable metal grids. Among them, Ag nanowires are particularly interesting to synthesize because bulk Ag exhibits the highest electrical conductivity among all metals. Here we reviewed recently-published research works introducing various devices from organic light emitting diode to tactile sensing devices, all of which are employing AgNW for a conducting material. They proposed methods to enhance the stretchability and reversibility of the transparent electrodes, and apply them to make various flexible and stretchable electronics. It is expected that Ag nanowires are applicable to a wide range of high-performance, low-cost, stretchable electronic devices.