• 제목/요약/키워드: Package Structure

Search Result 500, Processing Time 0.025 seconds

Appraisal Method for Similarity of Large File Transfer Software (대용량 파일 전송 소프트웨어의 동일성 감정 방법)

  • Chun, Byung-Tae
    • Journal of Software Assessment and Valuation
    • /
    • v.17 no.1
    • /
    • pp.11-16
    • /
    • 2021
  • The importance of software is increasing due to the development of information and communication, and software copyright disputes are also increasing. In this paper, the source of the submitted programs and the files necessary for the execution of the program were taken as the scope of analysis. The large-capacity file transfer solution program to be analyzed provides additional functions such as confidentiality, integrity, user authentication, and non-repudiation functions through digital signature and encryption of data.In this paper, we analyze the program A, program B, and the program C. In order to calculate the program similarity rate, the following contents are analyzed. Analyze the similarity of the package structure, package name, source file name in each package, variable name in source file, function name, function implementation source code, and product environment variable information. It also calculates the overall similarity rate of the program. In order to check the degree of agreement between the package structure and the package name, the similarity was determined by comparing the folder structure. It also analyzes the extent to which the package structure and package name match and the extent to which the source file (class) name within each package matches.

A Study on Localization Model of Package Usage in Ada Program (Ada 프로그램에서 패키지 활용의 국부화 모델에 관한 연구)

  • Kim Seon-Ho;Yun Chang-Seop
    • Journal of the military operations research society of Korea
    • /
    • v.17 no.2
    • /
    • pp.100-112
    • /
    • 1991
  • Software system is a hierarchical structure with collection of program units. Software system can import external packages globally or locally depending on the usage within a system. If the imported package is used globally, the soft-ware system can be influenced globally by any change of package and programmer's debugging time for the program maintenance will be greater. To solve these problems, it is desirable to use the imported package locally right on the usage point within the system. The model presented in this paper analyzed entity usage of package in structure of program, identified the usage level to obtain localization and provided information for restructure of the program to localize package usage. To obtain localization, it identified declared entities inside the imported package and analyzed the specification and body part of program unit to identify entities referenced from the imported package. The proposed model can be used to improve the maintainability of software system and contributed to reduction of programmer's debugging time in program maintenance.

  • PDF

A Study on the Optimization of Heat Dissipation in Flip-chip Package (플립칩 패키지의 열소산 최적화 연구)

  • Park, Chul Gyun;Lee, Tae Ho;Lee, Tae Kyoung;Jeong, Myung Yung
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.20 no.3
    • /
    • pp.75-80
    • /
    • 2013
  • According to advance of electronic packaging technology, electronic package becomes smaller. Miniaturization of package causes the temperature rise of package. This can degrade life of electronic device and generate the failure of electronic system. In this study, we proposed a new semi-embedded structure with micro pattern for maximizing heat dissipation. A proposed structure showed the characteristics which have maximum temperature lower than $20^{\circ}C$ compared with conventional structure. And also, in view of thermal stress and strain, our structure showed a remarkably low value compared with other ones. We expect that the new structure proposed in this work can be applied to an flip-chip package of the future.

A Novel Chip Scale Package Structure for High-Speed systems (고속시스템을 위한 새로운 단일칩 패키지 구조)

  • 권기영;김진호;김성중;권오경
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2001.11a
    • /
    • pp.119-123
    • /
    • 2001
  • In this paper, a new structure and fabrication method for the wafer level package(WLP) is presented. A packaged VLSI chip is encapsulated by a parylene(which is a low k material) layer as a dielectric layer and is molded by SUB photo-epoxy with dielectric constant of 3.0 at 100 MHz. The electrical parameters (R, L, C) of package traces are extracted by using the Maxwell 3-D simulator. Based on HSPICE simulation results, the proposed wafer level package can operate for frequencies up to 20GHz.

  • PDF

A Study on the Thermal Fatigue of Solder Joint by Package Types (패키지 유형에 따른 솔더접합부의 열피로에 관한 연구)

  • 김경섭;신영의
    • Journal of Welding and Joining
    • /
    • v.17 no.6
    • /
    • pp.78-83
    • /
    • 1999
  • Solder joint is the weakest part which connects in mechanically and electronically between package body and PCB(Printed Circuit Board). Recently, the reliability of solder joint become the most critical issue in surface mounted technology. The solder joint interconnection between plastic package and PCB is susceptible to shear stress during thermal storage due to the mismatch in coefficient of thermal expansion between plastic package and PCB. A general computational approach to determine the effect of solder joint shape on the fatigue life presented. The thermal fatigue life was estimated from the engelmaier equation which was obtained from the temperature cycling loading($-65^{\circ}C$ to $150^{\circ}C$). As result of the simulation, TSOP structure has the shortest thermal fatigue life and the same structure Copper lead has 2.5 times as much fatigue life as Alloy 42 lead. In BGA structure, fatigue life time extended 80 times when underfill material exists.

  • PDF

DRAM Package Substrate Using Via Cutting Structure (비아 절단 구조를 사용한 DRAM 패키지 기판)

  • Kim, Moon-Jung
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.48 no.7
    • /
    • pp.76-81
    • /
    • 2011
  • A new via cutting structure in 2-layer DRAM package substrate has been fabricated to lower its power distribution network(PDN) impedance. In new structure, part of the via is cut off vertically and its remaining part is designed to connect directly with the bonding pad on the package substrate. These via structure and substrate design not only provide high routing density but also improve the PDN impedance by shortening effectively the path from bonding pad to VSSQ plane. An additional process is not necessary to fabricate the via cutting structure because its structure is completed at the same time during a process of window area formation. Also, burr occurrence is minimized by filling the via-hole inside with a solder resist. 3-dimensional electromagnetic field simulation and S-parameter measurement are carried out in order to validate the effects of via cutting structure and VDDQ/VSSQ placement on the PDN impedance. New DRAM package substrate has a superior PDN impedance with a wide frequency range. This result shows that via cutting structure and power/ground placement are effective in reducing the PDN impedance.

A Study on Duty Competency and Utilizing Package Development for Construction of Marine Terminal Structure (해양터미널구조물설치분야 직무능력 및 활용패키지 개발에 대한 연구)

  • PARK, Jong-Un;KANG, Beodeul;BAEK, In-Hum
    • Journal of Fisheries and Marine Sciences Education
    • /
    • v.28 no.2
    • /
    • pp.456-464
    • /
    • 2016
  • NCS development for construction of marine terminal structure was carried out through following procedures such as analysis on characteristics, analysis on duty, development of the first draft for standards, validation of industry sites, duty competency standards through expert committee, and utilizing package. The results were as follows. Firstly, duty competency was classified as levels from 3 to 7. Educational training institutions were followed by 22 universities, 21 colleges, 16 graduate schools, and 10 high schools. Secondly, developed standards were consisted of duty and competency unit. The name of duty was construction of marine terminal structure and competency units were consisted of 9 items as survey on economic effect, evaluation of conditions on construction environment, plan for construction of structure, construction of transfer, mooring, and power equipment, and construction, startup test, and maintenance of terminal structure. 33 competency unit elements below 9 competency units were developed. Thirdly, utilizing package was developed into 3 areas of life-long career path, training criteria, and guidelines for exam according to national competency standards for in order to develop development of labor's career and perform personal management such as hiring and promotion in industry sites.

Numerical Study on Package Warpage as Structure Modeling Method of Materials for a PCB of Semiconductor Package (반도체 패키지용 PCB의 구조 모델링 방법에 따른 패키지의 warpage 수치적 연구)

  • Cho, Seunghyun;Ceon, Hyunchan
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.25 no.4
    • /
    • pp.59-66
    • /
    • 2018
  • In this paper, we analyzed the usefulness of single-structured printed circuit board (PCB) modeling by using numerical analysis to model the PCB structure applied to a package for semiconductor purposes and applying modeling assuming a single structure. PCBs with circuit layer of 3rd and 4th were used for analysis. In addition, measurements were made on actual products to obtain material characteristics of a single structure PCB. The analysis results showed that if the PCB was modeled in a single structure compared to a multi-layered structure, the warpage analysis results resulting from modeling the PCB structure would increase and there would be a significant difference. In addition, as the circuit layer of the PCB increased, the mechanical properties of the PCB, the elastic coefficient and inertia moment of the PCB increased, decreasing the package's warpage.

Package Modeling Change in Age of Feeling -Based on Solid Chocolate Package Structure by -√3 Proportion- (Feeling 시대의 Package 조형 변화 -√3 비례에 의한 판 초콜릿 Package 구조를 중심으로-)

  • Kwon, Il-Hyun;Nam, Young-Hyun
    • The Journal of the Korea Contents Association
    • /
    • v.7 no.8
    • /
    • pp.163-173
    • /
    • 2007
  • As present generation live in the age of feeling after been through age of need or age of want, we analyzed Signification based on consumer psychology, sociocultural variation. Based on above, we first built basic modeling from a regular triangle by $\sqrt{3}$ proportion and then approached to substantial modeling of products that enable us to distribute and sell. Furthermore, we built recycle modeling which enables us to create a variety of forms with joy after using products. This means a lot to us in terms of package modeling creation from sans code. Besides, we studied on not only materialistic or functional value of package modeling, but also appropriate semiotics that enable psychological and sociocultural function of package modeling to respond to consumer identity.

LTCC-Based Packaging Technology for RF MEMS Devices (LTCC를 이용한 RF MEMS 소자의 실장법)

  • Hwang, Kun-Chul;Park, Jae-Hyoung;Baek, Chang-Wook;Kim, Yong-Kweon
    • Proceedings of the KIEE Conference
    • /
    • 2002.07c
    • /
    • pp.1972-1975
    • /
    • 2002
  • In this paper, we have proposed low temperature co-fired ceramic (LTCC) based packaging for RF MEMS devices. The packaging structure is designed and evaluated with 3D full field simulation. 50 ${\Omega}$ matched coplanar waveguide(CPW) transmission line is employed as the test vehicle to evaluate the performances of the proposed package structure. The line is encapsulated with the LTCC packaging lid and connected to the via feed line. To reduce the insertion loss due to the packaging lid, the cavity with via post is formed in the packaging lid. The performances of the package structure is simulated with the different cavity depth and via-to-via length. Simulation results show that the proposed package structure has reflection loss better than 20 dB and insertion loss lower than 0.1 dB from DC to 30 GHz with the cavity depth and via-to-via length of 300 ${\mu}m$ and 350 ${\mu}m$, respectively. To realize the designed package structure, the cavity patterning is tested using the sandblast of LTCC.

  • PDF