• Title/Summary/Keyword: PWM-MODE

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Carrier Phase-Shift PWM to Reduce Common-Mode Voltage for Three-Level T-Type NPC Inverters

  • Nguyen, Tuyen D.;Phan, Dzung Quoc;Dao, Dat Ngoc;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.14 no.6
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    • pp.1197-1207
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    • 2014
  • Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.

A New Active Zero State PWM Algorithm for Reducing the Number of Switchings

  • Yun, Sang-Won;Baik, Jae-Hyuk;Kim, Dong-Sik;Yoo, Ji-Yoon
    • Journal of Power Electronics
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    • v.17 no.1
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    • pp.88-95
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    • 2017
  • To reduce common-mode voltage (CMV), various reduced CMV pulse width modulation (RCMV-PWM) algorithms have been proposed, including active zero state PWM (AZSPWM) algorithms, remote state PWM (RSPWM) algorithms, and near state PWM (NSPWM) algorithms. Among these algorithms, AZSPWM algorithms can reduce CMV, but they increase the number of switchings compared to the conventional space vector PWM (CSVPWM). This paper presents a new AZSPWM algorithm for reductions in both the CMV and total number of switchings in BLAC motor drives. Since the proposed AZSPWM algorithm uses only active voltage vectors for motor control, it reduces CMV by 1/3 compared to CSVPWM. The proposed AZSPWM algorithm also reduces the total number of switchings compared to existing AZSPWM algorithms by eliminating the switchings required from one sector to the next. The performance of the proposed algorithm is verified by analyses, simulations, and experimental results.

A Study on the Design of Voltage Mode PWM DC/DC Power Converter (전압모드 PWM DC/DC 전력 컨버터 설계연구)

  • Lho, Young-Hwan
    • Journal of the Korean Society for Railway
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    • v.14 no.5
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    • pp.411-415
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    • 2011
  • DC/DC switching power converters are commonly used to generate a regulated DC output voltages with high efficiencies from different DC input sources. The voltage mode DC/DC converter utilizes MOSFET (metal-oxide semiconductor field effect transistor), inductor, and a PWM (pulse-width modulation) controller with oscillator, amplifier, and comparator, etc. to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter and a buck converter containing a switched-mode power supply are studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by program of SPICE, and the PWM controller is implemented to check the operation. In addition, power efficiency is analyzed based on the specification of each component.

A Study on Technology Development of High Capacity PWM Converter for Electric Vehicle (전기철도용 대용량 PWM 컨버터 기술개발에 관한 연구)

  • Han, Young-Jae;Jo, Jeong-Min;Bae, Chang-Han;Lee, Young-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.12
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    • pp.1729-1734
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    • 2018
  • Recently, interest in environmentally friendly transportation systems has been increasing, and study on railway systems has been aggressively conducted. Therefore, lots of studies have been done in railway advanced countries to improve performance of PWM converter. The research on the PWM converter for railway vehicle was mainly carried out on the converter mounted on railway vehicle such as the high-speed railway and metropolitan railway. In also, a lot of study has been carried out to improve converter performance installed in the ground. The high-capacity transform used in this paper converted from AC 22.9kV to AC 590V. The converter changed from AC 590V to DC 950V. In general, in the case of rectifier, the DC power supply system has a negative impact on inverter control characteristics because it can not avoid the pulsating component. In this study, it was performed current control for high-capacity converter using Matlab Simulink. The PWM converter is normally performed through the voltage and current at starting mode, powering mode, and braking mode. In the light-load test and the on-line test, we have studied for the PWM converter characteristics. Using this research, we have founded that the converter has excellent performance.

A Switching Technique for Common Mode Voltage Reduction of PWM-Inverter System using the DSP320F240 (DSP320F240을 이용한 PWM-Inverter구동 시스템에서의 전도노이즈 저감을 위한 스위칭 기법)

  • Park Hyun Seok;Park Kyu Hyun;Kim Lee Hun;Han Sung Yong;Won Chung Yuen;Kim Young Real
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.355-359
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    • 2002
  • Much attention has been given to EMI effects created in variable speed ac drive system. Zero switching states of inverter control invoke large common mode voltage. This paper focuses on the switching techniques to mitigate common mode voltage. This paper proposes a common-mode voltage reduction method based on sinusoidal pulse width modulation in three phase PWM inverter system. By using three carriers wave displaced by 120 degrees, it is possible to eliminate a common mode voltage pulse In one control period. Simulation and experimental results show that common mode voltages In the proposed technique are reduced more than conventional technique.

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Low-area Dual mode DC-DC Buck Converter with IC Protection Circuit (IC 보호회로를 갖는 저면적 Dual mode DC-DC Buck Converter)

  • Lee, Joo-Young
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.586-592
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    • 2014
  • In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

Design of the DC-DC Buck Converter for Mobile Application Using PWM/PFM Mode (PWM/PFM 모드를 이용한 모바일용 벅 변환기 설계)

  • Park, Li-Min;Jung, Hak-Jin;Yoo, Tai-Kyung;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.11B
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    • pp.1667-1675
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    • 2010
  • This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.

Differential Geometric Approach to Sliding Mode Control of Spacecraft Attitude Tracking

  • Cheon, Yee-Jin
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.1599-1603
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    • 2004
  • Based on the idea that nonlinear PWM controller design can be directly applied to the attitude tracking problem of thruster-controlled spacecraft because it constitutes a sub-class of nonlinear PWM controlled system, nonlinear and output error feedback PWM controlled system is considered to describe the behavior of thruster-controlled spacecraft, and to determine actual thruster on-time which guarantees system stability. A differential geometric approach is utilized to show an asymptotical stability of average PWM system, which finally guarantees the stability of closed loop PWM controlled system. Simulation results show that the motions of PWM controlled system occurs very closely around those of the average model of PWM controlled system.

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Input Impedances of PWM DC-DC Converters: Unified Analysis and Application Example

  • Pidaparthy, Syam Kumar;Choi, Byungcho
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2045-2056
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    • 2016
  • The input impedances of pulse width modulated (PWM) dc-to-dc converters, which dictate the outcomes of the dynamic interaction between dc-to-dc converters and their source subsystem, are analyzed in a general and unified manner. The input impedances of three basic PWM dc-to-dc converters are derived with both voltage mode control and current mode control. This paper presents the analytical expressions of the 24 input impedances of three basic PWM dc-to-dc converters with the two different control schemes in a factorized time-constant form. It also provides a comprehensive reference for future dynamic interaction analyses requiring knowledge of the converters' input impedances. The theoretical predictions of the paper are all supported by measurements on prototype dc-to-dc converters. The use of the presented results is demonstrated via a practical application example, which analyzes the small-signal dynamics of an input-filter coupled current-mode controlled buck converter. This elucidates the theoretical background for the previously-reported eccentric behavior of the converter.

The Suppression of both leakage current and common-mode voltage occurring three phase PWM voltage type inverter (3상 PWM 전압형 인버터에 발생하는 누설전류와 동상모드 전압의 억제)

  • Mun, S.P.;Suh, K.Y.;Kwon, S.K.;Kim, J.Y.;Kim, Y.M.;Kim, H.J.;Kim, J.S.
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1515-1517
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    • 2005
  • In this paper, we represent both occurrence reason of Surge-voltage and Leakage-current of AC drive system which is operated by Voltage-type PWM Inverter. It generates a compensating voltage which has the same amplitude as, but the opposite phase to, the common-mode voltage produced by the PWM inverter. The compensating voltage is superimposed on the inverter output by a common-mode transformer. As a result, the common-mode voltage applied to the load is canceled completely. The design method of the active common-mode noise canceler is also presented in detail. Therefore, we try to describe the method controling both of them and all of the proprieties are proved by our experiment.

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