• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.525-527
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• 1994

A quasi parallel resonant do-link (QPRDCL) circuit with improved PWM capability is Proposed for tile zero voltage switching (ZVS) three phase PWM inverter. The peak voltage stresses of switches are all clamped to the dc-link voltage $V_d$. The proposed QPRDCL inverter has highly improved PWM capability due to selecting the on/off instants of the resonant link at will. Operational principles and analyses of the proposed QPRDCL circuit are explained and verified by simulation results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.3
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• pp.355-364
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• 2013

Respect to the input AC voltage and output DC voltage, conventional three-phase PWM rectifier is classified as the voltage type rectifier with boost capability and the current type rectifier voltage with buck capability. Conventional PWM rectifier can not at the same time the boost and buck capability and its bridge is weak in the shoot- through state. These problems can be solved by Z-source PWM rectifier which has all characteristic of voltage and current type PWM rectifier. By shoot-through duty ratio control, the Z-source PWM rectifier can buck and boost at the same time, also, there is no need to consider the dead time. This paper proposes the input AC voltage sensorless control method of a three-phase Z-source PWM rectifier in order to accomplish the unity input power factor and output DC voltage control. The proposed method is estimated the input AC voltage by using input AC current and output DC voltage, hence, the sensor for the input AC voltage detection is no needed. comparison of the estimated and detected input AC voltage, estimated phase angle of the input voltage, the output DC voltage response for reference value, unity power factor, FFT(Fast Fourier Transform) of the estimated voltage and efficiency are verified by PSIM simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.2 no.2
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• pp.8-18
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• 1997

In this paper, a New Low Loss Quasi-Parallel Resonant DC-Link(NLQPRDCL) Inverter which shows highly improved PWM capability, low loss characteristic and low voltage stress is presented. A method to minimize freewheeling interval, which is able to largely decrease DC-link operation losses and to steadily guarantee soft switching in the wide operation region is also proposed. In addition, lossless control of zero voltage duration of DC-link makes the proposed inverter maintain the advanced PWM capability even under a very low modulation index. Experiment and simulation were performed to verify validity of the proposed inverter topology.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.358-361
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• 1999

In auxiliary block of high speed train power factor correction and harmonics reduction is very important issue for efficient energy transport. The GTO-equipped PWM converter is used for traction untill resently. But the rising power capability of IGBTs resently allows to build IGBT-equipped PWM converter with a considerably increased switching frequency. This paper presents switching pattern, control method, operation mode and tuned filter to reduce dc link voltage ripple for paralleled converter.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.179-183
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• 2001

This paper presents a simple current control strategy for matrix converters based on the extension of PWM method for inverters. A novel and efficient PWM algorithm is developed. The algorithm is verified through simulation and experiments employing a 2-kVA prototype. The results of simulation and experiment prove the instantaneous control capability of the output current with the sinusoidal input current.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.245-246
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• 2008

This paper is proposed a high performance speed control of the Synchronous Reluctance Motor through the FNN(Fuzzy Neural-Network) based SV-PWM(Space Vector PWM). SV-PWM is controlled using FNN control. SV-PWM can be maximum used maximum dc link voltage and is excellent control method due to characteristic to reducing harmonic more than others. The hybrid combination of fuzzy control and neural network will produce a powerful representation flexibility and numerical processing capability. Simulation results are presented to show the validity of the proposed algorithm.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2008.10a
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• pp.311-314
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• 2008

This paper is proposed a high performance speed con01 of the Interior Permanent Magnet Synchronous Motor through the Fuzzy-Neuro SV-PWM, SV-PWM is controlled using Fuzzy-Neuro control. SV-PWM can be maximum used maximum dc link voltage and is excellent control method due to characteristic to reducing harmonic more than others. The hybrid combination of fuzzy control and neural network will produce a powerful representation flexibility and numerical processing capability. Simulation results are presented to show the validity of the proposed algorithm.

• Proceedings of the KIPE Conference
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• 2008.10a
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• pp.175-177
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• 2008

This paper is proposed a high performance speed control of the Interior Permanent Magnet Synchronous Motor through the HAI based SV-PWM. SV-PWM is controlled using HAI control. SV-PWM can be maximum used maximum dc link voltage and is excellent control method due to characteristic to reducing harmonic more than others. The hybrid combination of fuzzy control and adaptive control will produce a powerful representation flexibility and numerical processing capability. Simulation results are presented to show the validity of the proposed algorithm.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.7 no.3
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• pp.27-33
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• 1993

This paper presents the &tal controller for driving high frequency voltage fed PWM inverter that carrier frequency is over 2OkHz.We analyzed the conventional PWM to select a proper PWM pattern. as the result, obtained PWM pattern of the controller in which asynchronus staircase sinusoidal waveform is used as reference signal, and variable carrier ratio method was used for PWM control. The PWM controller is designed by fully digital method. Especially, Thk proposed controller is consisted of 8 bit one-chip microprocessor and digital logic. the former is for arithmetic and data processing, and the latter is for PWM pattern synthesis. Therefore, The responsibility and controllability is improved. Also, Data processing capability is improved using proper program to output modulation index with 9 bits. Circuits configuration of digital controller are made up of one chip 8051 and EPLD, and its controllability is tested by operating voltage fed inverter. Harmonics and current waveform is evaluated and analyzed for the voltage fed inverter system.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.1 no.1
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• pp.75-82
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• 1987

Application of conventional phase controlled power electronic circuits causes reduced power factor and increased harmonic component in the electric sources. Therefore, an Optimal PWM strategy has been investigated here in order to reduce to a large extent these effects mentioned. Optimal PWM converter has been to minimize the rms harmonic current in the sources and has been found to have a duality with Optimal PWM inverter. The voltage patterns of Optimal PWM Inverters are governed by the same switching patterns and control laws as the current patterns for Optimal PWM converter. The improvement requires switching devices having a high speed capability. While this formerly did require thyristors with force commutation circuits, today this feature is easily implemented by using power Transistor or GTOs. The control laws for minimizing the rms harmonics current in the source, the circuits and the results are shown in the paper.