• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.960-964
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• 2003

In this paper, the CMOS integrated circuit technique for implementing current-mode maximum and minimum operations scheme is described. The maximum and minimum operations are incorporated into the same scheme with parallel processing. Using this scheme as the basic unit, an analog three-input maximum, median, and minimum circuit is designed. The performance of the proposed circuit shows a very sharp transfer characteristic and high accuracy. The proposed circuit achieves a high-speed operation, which is suitable for real-time systems. The PSPICE simulation results demonstrating the characteristic of the proposed circuit are included.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.951-954
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• 2003

A CMOS second generation current conveyor, which can be operated from a low-voltage power supply, is presented in this article. The proposed circuit is simple, small in size and suitable for implementing in standard CMOS process. It provides the resistance at port X lower than 3.5${\Omega}$. The bandwidth of the transfer characteristic extends beyond 326MHz. PSPICE simulation results demonstrating the characteristics of the proposed circuit are included.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.29B no.11
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• pp.56-64
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• 1992

The sum-of-product type MVL (Multiple-valued logic) functions can be directly transformed into the exclusive-sum-of-literal-product(ESOLP) type MVL functions with a substitution of the OR operator with the exclusive-OR(XOR) operator. This paper presents an algorithm that can reduce the number of minterms for the purpose of minimizing the hardware size and the complexity of the circuit in the realization of ESOLP-type MVL functions. In Boolean algebra, the joinable true minterms can form the cube, and if some cubes form a cube-chain with adjacent cubes by the insertion of false cubes(or, false minterms), then the created cube-chain can become a large cube which includes previous cubes. As a result of the cube grouping, the number of minterms can be reduced artificially. Since ESOLP-type MVL functions take the MIN/XOR structure, a XOR circuit and a four-valued MIN/XOR dynamic-CMOS PLA circuit is designed for the realization of the minimized functions, and PSPICE simulation results have been also presented for the validation of the proposed algorithm.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2851-2854
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• 2003

The purpose of this paper was to find out the stabilized and effective value of RC-parameter by using PSpice simulation, considering that gate signal voltage can be distorted by RC-delay of signal line. the results of this study were as follows: TFT-LCD with high quality resolution increased the number of gate signal line and this made TFT on-time shorter over-width of signal line to improve the performance of TFT made the electrostatic capacity increase and the time constant higher, making problems and errors. and owing to the decrease of the aperture ratio, an electro optic character of LCD, we must consider the capacity and the condition of production process in deciding the width and the thickness of the gate signal line.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2237-2239
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• 1997

The conventional three phase rectifier with Bulk LC output filter has been widely used in the industry because of simple circuit, low cost and high power factor (90%). One of the biggest drawback of this rectifier is bulky and havy. This is serious especially for aerospace applications. To solve this problem a new simple rectifier is presented. Operation of the proposed rectifier is illustrated and verifyed by PSpice simulation.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2168-2170
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• 1997

A paralled-loaded electronic ballast operating slighty above its resonant frequency is selected because of the high voltage gains. It is shown that the ballast can be designed to operate under Zero Voltage Switching(ZVS) conditions. Pspice simulation is useful in predicting the waveformes and rms of lamp voltage and current.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.594-596
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• 1996

Static power converters can be analyzed by means of available circuit simulation software packages such as PSPICE. This paper proposes the macro models developing technique for three-phase power converters using the transfer function approach. Also, these models are based on converter switching functions rather than actual circuit configuration. In this approach, VSI(Voltage Source Inverter) and CSI(Current Source Inverter) are simulated as multiport networks avoiding nonlinear macromodels of the power switches.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.492-494
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• 1996

This paper describes a study on the series resonant inverter using the double full-bridge, and the output voltage of the proposed inverter is controlled by phase shift angle of the outputs of two inverters. These control schemes can be reduce the switching loss and EMI, etc, which the inverter is drived by auto following control of output frequency, because it is impossible for switching devices to be always turned on and off at zero voltage or zero current. Theoretical characteristics of the proposed double inverter circuit are compared with Pspice simulation and experimental results.

• Proceedings of the KIEE Conference
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• 2003.10b
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• pp.227-231
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• 2003

In This paper, A novel zero-voltage-switching(ZVS) resonant DC-DC converter is proposed. it is composed of two symmetrical active-clamped circuits, The converter can achieve each switchs ZVS. proposed circuit is active clamp capacitor Ratios can be reduce switching voltage stress of each main switch. Simulation results using Pspice ver 9.2 show that the prove the validity of theoretical analysis.

• Proceedings of the KIPE Conference
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• 1997.07a
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• pp.216-221
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• 1997

At present, high frequency electronic ballast are widely used to drive the fluorescent lamp at high frequency for improving light quality. The electronic ballast mainly consist of an inverter stage with a load resonant circuit. This paper derives a lamp model consist of a voltage equation and a current equation. The proposed model is useful for an engineer to determine circuits and to analyze the performance of electronic ballast with high frequency operation. Simulation with PSPICE and experimentator and the high power factor of the proposed topology.