• 제목/요약/키워드: PSPICE modeling

검색결과 52건 처리시간 0.025초

뇌서지 전류에 대한 산화아연바리스터의 Pspice 시뮬레이션 모델 (Pspice Simulation Model of a ZnO Varistor for Lightning Surge Current)

  • 이복희;공영훈;이경옥;강성만
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 E
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    • pp.1675-1677
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    • 1998
  • It is currently increasing to use surge protection devices in the protection of various electronic circuits from the transient overvoltages such as lightning strikes and switching surges. For this reason, the simulation methods, which can easily predict the protection performance of the devices, are strongly required in order to design the adequate surge protection circuits in lightning surge cut-off performance and economic aspects. This paper deals with ZnO varistor modeling method for designing a surge protection circuit and suggests the Pspice simulation model which takes the characteristic of varying clamping voltage into consideration during the time-to-crest, in range of $8{\sim}30{\mu}s$, of surge current applied to a ZnO varistor. The ZnO varistor Pspice simulation data introduced in this paper has produced almost same values as the measured results experimentally.

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AT 포워드 다중공진형 컨버터의 모델링 해석 (The Modeling Analysis of the AT Forward Multi-Resonant Converter)

  • 김창선
    • 조명전기설비학회논문지
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    • 제14권3호
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    • pp.6-14
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    • 2000
  • 고효율 다중공진형 컨버터는 스위칭 손질을 다중공진 회로를 이용하여 감소시킬 수 있기 때운에 고주파에서 동작이 가능하다. 이려한 고주파 스위칭 동작은 컨버터에 높은 전력 밀도를 제공한다. 그러나 공진 스위치애 걸리는 전압 스트레스는 입력전압의 4~5배 정도여서, 높은 정격의 소자를 필요로 하기 때문에 소자의 온-저항으로 인한 전도 손실을 증가시킨다. 본 문에서는 이러한 문제점 해결하기 위해 제안했던 전압 스트레스를 줄일 수 있는 AT 포워드 MRC는 모델링 해석파 이를 이용한 등가 모드 해석을 하였다. AT 포워드 MRC는 2개의 다중 공전 스위치의 동작 순서에 따라 8개의 등가 모델링이 가능하다. 이 컨버터의 동작 원리는 입력 48[V], 출력 5[V]/50[W]의 실험세트와 PSpice 시뮬레이션을 통해 확인되었으며, 측정된 최대 전압 스트레스는 입력전압의 2.9 배인 170[V]였고 최대 효율은 81.66i%로 측정되었다.

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최근의 형광등 광원의 모델링 기술 고찰 (A Review of Fluorescent Lamp Modeling Technology)

  • 한수빈;박석인;정봉만;정학근;송유진;유승원
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2007년도 춘계학술대회 논문집
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    • pp.54-56
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    • 2007
  • In recent, modeling methods for fluorescent lamp are developed well in both static and dynamic state. The models help reliable ballast to be developed in more fast time. This paper reviews the concept and method for well developed models, especially, circuit oriented models using PSpice.

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최적 dechucking 시스템 구현에 관한 연구 (A Study on the Implementation of Optimized Dechucking System)

  • 서종완;서희석;신명철
    • 조명전기설비학회논문지
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    • 제21권5호
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    • pp.106-111
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    • 2007
  • 반도체 공정에서 각 단계별 과정을 거친 후 dechucking시 wafer가 ESC(Electrostatic Chuck)로부터 방전되지 못하고, 잔류되어 있는 극성을 띤 전하(Electric charge)들에 의해 wafer와 ESC사이에 인력이 발생하여 wafer의 sliding, popping 및 wafer broken 등의 문제가 발생한다. 본 논문에서는 wafer와 ESC의 구성을 capacitor를 이용하여 modeling하고, PSpice를 사용하여 chucking system에 의한 wafer의 대전 현상을 모의하고 그 결과를 바탕으로 잔류전하를 방전시키기 위한 여러 가지 방법을 검토하여 최적의 잔류전하 제거 기법을 제시한다. 즉 별도의 전압원을 사용하여 (+)와 (-)를 교번하는 구형파를 인가함과 아울러 일정시간 동안 Plasma내에서 스위칭시킴으로써 ESC나 wafer에 charge되어 있는 극성을 띤 전하들을 중화(Neutralize) 시키도록 하였다. 그리고 이를 실제 하드웨어로 구현하여 실 공정에 적용한 결과를 제시한다.

TFT-LCD 특성 분석을 위한 poly-Si TFT 소자 모델링 및 회로 시뮬레이션 (Modeling of Poly-Si TFT and Circuit Simulation for the Analysis of TFT-LCD Characteristics)

  • 손명식;류재일;심성융;장진;유건호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.314-317
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    • 2000
  • In order to analyze the characteristics of complicated TFT-LCD (Thin Film Transistor-Liquid Crystal Display) circuits, it is indispensible to use simulation programs. In this study, we present a systematic method of extracting the input parameters of poly-Si TFT for Spice simulation. This method is applied to two different types of poly-Si TFTs fabricated in our group with good results. Among the Spice simulators, Pspice has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT model on the Pspice simulator, which would contribute to efficient simulations of poly-Si TFT-LCD pixels and arrays.

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A PSpice Modeling of PFC Circuit Using Soft-Switched Boost Converter

  • Mok, H.S.;Choe, G.H.;Jeong, S.E.;Choi, J.Y.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1997년도 전력전자학술대회 논문집
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    • pp.393-399
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    • 1997
  • Single-phase and three-phase AC to DC power converters are becoming frequently used for high voltage/high power applications such as telecommunications. They often require input/output transformer isolation for safety, a unity input power factor for minimum reactive power, free input harmonic currents fed back to the AC Power distribution system and, finally, high efficiency and high power density for minimum weight and volume. The proposed boost converter for power factor correction (PFC) provides an unity input power factor, low harmonic distortion and high efficiency along with reduced volume and weight. Single-phase 220VAC input/380VDC 1KW output prototype is constructed and experimental results will be verified with those of PSpice simulation.

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임펄스 전류에 대한 ZnO 바리스터의 Pspice 모델 (Pspice Model of a ZnO Varistor for Impulse Current)

  • 이복희;공영훈;이동문
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 E
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    • pp.2161-2163
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    • 1999
  • Generally, ZnO varistors have dynamic characteristics that the cut-off voltage increases as the time to crest of the varistor current decreases. Dynamic characteristics of ZnO varistor are the most important factor in region of the steep front discharge current particularly. Also, V-I characteristics of ZnO varistor have hysterisis loop in time domain and frequency dependency. This paper deals with ZnO varistor numerical equation and modeling method which takes the behavior of varying clamping voltage into consideration during the time to crest, in range of $1{\mu}m{\sim}50{\mu}m$, of impulse current applied to a ZnO varistor. The simulated results by the proposed model are compared with experimental results for each of the impulse current.

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대규모 PV시스템의 태양전지 어레이 구성법 (Solar Cell Arrays Connection of Large Scale PV System)

  • 유권중;송진수;노명근;성세진
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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    • pp.326-328
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    • 1996
  • The 10kW or 1MW model of a photovoltaic array written in PSPICE is presented in this paper. A problem with this large scale centralized photovoltaic system is the decrease of power due to the resistance of cable connecting individual subarray with inverter. In this paper, we analyzed the relationship between the resistance of cable and subarray output power of 1MW photovoltaic system by the PSPICE modeling. As a result of simulation, we can proved that photovoltaic array output power is limitted by the resistance of cable.

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태양광발전 시스템의 모델링 및 MPPT 제어 (Modelling of PV System and MPPT Control)

  • 송호빈;백동현;조문택
    • 전기학회논문지P
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    • 제59권4호
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    • pp.405-410
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    • 2010
  • In this paper, the simulation of solar system was used to facilitate PSPICE. Solar cells, Controller, MPPT system, DC-DC system modeling, and easy to use, made to the library. To prove the validity of the library for the temperature and space radiation were simulated and behavioral characteristics were identified. To prove the validity of the simulation, the hardware was constructed to the same conditions. Implemented using the hardware and the DSP controller for a real system, the results were confirmed by experiments.

An Improved Distributed Equivalent Circuit Modeling for RF Components by Real-Coefficient AFS Technique

  • Kim, Koon-Tae;Ko, Jae-Hyeong;Paek, Hyun;Kahng, Sung-Tek;Kim, Hyeong-Seok
    • Journal of Electrical Engineering and Technology
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    • 제6권3호
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    • pp.408-413
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    • 2011
  • In this paper, a real-coefficient approach to Adaptive Frequency Sampling (AFS) technique is developed for efficient equivalent circuit modeling of RF components. This proposed method is advantageous than the vector fitting technique and the conventional AFS method in terms of fewer samples leading to a lower order of a rational function on a given data and to a direct conversion to an equivalent circuit for PSPICE(Personal Simulation Program with Integrated Circuit Emphsis) simulation, respectively. To validate the proposed method, the distributed equivalent circuit of a presented multi-layered RF low-pass filter is obtained using the proposed real-coefficient AFS, and then comparisons with EM simulation and circuit simulation for the device under consideration are achieved.