• Proceedings of the KIEE Conference
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• 1998.07e
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• pp.1824-1827
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• 1998

A Laser Doppler Vibrometer(LDV) was developed using He-Ne laser as a light source. The heterodyne method was employed and its output signal was digitally processed with a $\mu$-processor and the result was displayed with LCD. The frequency shifted object beam(40 MHz) by a Bragg cell was focused on the surface of the moving target and the Doppler shifted reflected beam was recombined with reference beam at the fast photodetector to produce frequency modulated signal centered at 40 MHz. The signal from the detector was amplified and downconverted to intermediate frequency centered at 1 MHz after mixing process. The voltage output that was proportional to the velocity of the moving surface was obtained using PLL. With the same method, the fringe pattern signal of the moving surface is obtained. This fringe pattern signal is converted to TTL signal with ZCD(zero-crossing detector) and then counted to calculate the displacement due to the vibration, which is displayed with LCD. This LDV can be used to measure the resonant frequency of the electric equipments such as circuit breakers and transformers, of which resonant frequencies are changed when they are damaged.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1101-1107
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• 2017

In this paper, a robust and fast grid synchronization method of a three-phase power converter is proposed. The amplitude and phase information of grid voltages are essential for power converters to be properly connected into the utility. The phase-lock-loop in synchronous reference frame has been widely adopted for the three-phase converter system since it shows a satisfactory performance under balanced grid voltages. However, power converters often operate under abnormal grid conditions, i.e. unbalanced by grid faults and frequency variations, and thus a proper active and reactive power control cannot be guaranteed. The proposed method adopts a second order generalized integrator in synchronous reference frame to detect positive sequence components under unbalanced grid voltages. The proposed method has a fast and robust performance due to its higher gain and frequency adaptive capability. Simulation and experimental results show the verification of the proposed synchronization algorithm and the effectiveness to detect positive sequence voltage.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.12
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• pp.31-39
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• 1993

In the playback signal processing of a digital magnetic recording system, the major signal processing processes consist of pulse equalization. pulse detection, clock recovery, and data recovery. Equalizer which compensates interference occurrde between pulses recorded in high density on a magnetic media is realized by pulse slimming method, and pulse detection by a integrating detector. Clock recovery from the detector output was accomplished by using PLL. and data recovery to reduce noise effects was carried out by utilizing the three sampling clocks recovered in clock recovery process. In this paper these processes are implemented in hardware and its performance is evaluated by experimenting with a commercial DAT. It was found that the playback signal processor proposed is suitable to the practical high density magnetic recording system.

• Journal of Electrical Engineering and Technology
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• v.11 no.6
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• pp.1707-1713
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• 2016

This paper proposes a dc error compensation algorithm using dq-synchronous coordinate transform digital phase-locked-loop in single-phase grid-connected converters. The dc errors are caused by analog to digital conversion and grid voltage during measurement. If the dc offset error is included in the phase-locked-loop system, it can cause distortion in the grid angle estimation with phase-locked-loop. Accordingly, recent study has dealt with the integral technique using the synchronous reference frame phase-locked-loop method. However, dynamic response is slow because it requires to monitor one period of grid voltage. In this paper, the dc offset error compensation algorithm of the improved response characteristic is proposed by using the synchronous reference frame phase-locked-loop. The simulation and the experimental results are presented to demonstrate the effectiveness of the proposed dc offset error compensation algorithm.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.8
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• pp.399-403
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• 2006

An accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation when an external crystal is not available to provide a clock signal. Further, incorporation of the analog memory cell in the low power oscillator is fully implementable in a 0.35um Samsung standard CMOS process. Therefore, the analog memory cell incorporated into the low power oscillator avoids the previous problems in a oscillator by providing a temperature-stable, low power consumption, size-efficient method for generating an accurate reference clock signal that can be used to support long sleep mode operation.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.235-238
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• 2003

In this study, we propose a method of digital control to drive the vibrating gyroscope using electromagnetic-force. The gyroscope requires accurate vibration control and signal processing for high performance. Conventional PLL based analog controller is not only difficult to manufacture but also weak to outer environment such as temperatures, air pressures and etc. But digital controller using DSP can consistently maintain the cylinder vibration and perform digital signal processing regardless of disturbance. DSP's PWM function was utilized to control the vibration, and rotation-detecting algorithm was developed. Finally, the controller was verified by simulation and experiment using rotation-rate table.

• Proceedings of the KIPE Conference
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• 2007.11a
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• pp.190-192
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• 2007

본 논문에서는 새로운 FFT에 의한 계통위상 추정 알고리즘을 제안한다. 신재생 에너지 분야에 적용되는 계통연계형 인버터에서는 계통과 동기를 위해서는 반드시 계통의 위상 정보가 필요하다. 일반적으로 사용하는 3상 D-Q 변환에 의한 위상 추종과 달리 새롭게 제안하는 FFT를 사용하는 알고리즘은 게인 튜닝 부분이 없으며 FFT의 특성상 기본주파수 이외의 성분을 제외한 강력한 노이즈 제거효과로 인해 직접적이며 노이즈에 강한 특징을 가지고 있다. 시뮬레이션과 실험을 통하여 제안한 알고리즘의 성능이 만족할 만한 성능을 얻을 수 있음을 보였다.

• Proceedings of the KIPE Conference
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• 2009.11a
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• pp.209-211
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• 2009

A digital grid synchronization technique is needed for distributed generation system to make output current sinusoidal even if the grid voltage is distorted by harmonics. In this paper, a digital grid synchronization technique based on adaptive notch filter is proposed. The analysis of proposed technique is performed through the consideration of grid synchronization technique based on PLL and FLL, and the validity of the proposed method was confirmed by simulation results.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1108-1113
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• 1992

In this paper, the high frequency twin resonant inverter using MOSFET is presented. The output control is excellent and the EMI noise is reduced, because the output appear as the vector sum of current in each unit inverter. The output voltage and the output current of the inverter are controlled by PLL. In this paper, the principle of the twin resonant method is described. And computer simulations and experimental results are shown.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.269-272
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• 2003

A low phase noise frequency synthesizer at X-Band which employs the subharmonic injection locking was designed and tested. The frequency synthesizer consists of two oscillators - master and slave : A 1.75GHz master oscillator made of PLL synthesizer produces 6th harmonic at 10.5GHz, which excites the following 10.5GHz slave oscillator. The realized frequency synthesizer has a 4.5dBm of output power, and a phase noise of -108dBc/Hz at the 100kHz offset frequency.