• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.8
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• pp.1765-1773
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• 1997

The communication systems which include PLL may have cycle clip problem because of channel noise. The cycle slip problem occurs the synchronization loss of communication system and it may be fatal to the synchronous stream cipher system. While continuous resynchronization is used to lessen the risk of synchronization it has some problems. In this paper, we propose the method which solve the problems by using continuous resynchronization with the clock recovery technique. If the counted value of real clock pulse in reference duration is not same as that of normal state, we decide the cycle slip has occurred. The damaged clock by cycle slip is compensated by adding or subtracting the clock pulse according to the type of cycle slip. It reduced the time for resynchronization by twenty times. It means that 17.8% of data for transmit is compressed.

• Journal of IKEEE
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• v.25 no.4
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• pp.721-727
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• 2021

This paper proposes a UWB (Ultar-wideband) impulse generator using the gated ring oscillator. The oscillator and PLL circuits which generate a several GHz LO signal for the conventional architecture are replaced with the gated ring oscillator. Therefore, the system complexity is decreased. The proposed architecture controls the duty of enable signal, which is used for the head switch of ring oscillator. The control of the duty enables to tun off the oscillator during the guard interval and stop wasting the power consumption. The pulse shaping method using the counter makes the small side lobe and preserves the bandwidth regardless of the change on the center frequency. Designed UWB impulse generator could change the center frequency from 6.0 GHz to 8.8 GHz with a digital bit control, while it preserves the bandwidth as about 1.5 GHz.

• Proceedings of the IEEK Conference
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• summer
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• pp.23-26
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• 2004

Five-port reflectometer which consists of a ring with 5 arms (two inputs, three outputs) and three RF power detectors has been used as a vector network analyser, a demodulator in the homodyne receiver as well as in Phase Looked Loop (PLL) and so on. Calibration of five-port reflectometer is an important task. In this paper, we present a calibration method of five-port for a propagation channel sounder. The method is based on measurement of the phase differences between the three voltages at the five-port's outputs in order to determine the ratio of two input incident waves. The frequency channel sounder based on five-port is calibrated for each frequency from 2.2 GHz to 2.6 GHz with 1 MHz step. This method can also determine the absolute delays of each propagation path in the propagation channel. The calibration method is validated using measurement data.

• Journal of Positioning, Navigation, and Timing
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• v.9 no.4
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• pp.337-345
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• 2020

In this paper, an efficient signal tracking method to simultaneously track both GPS L1 C/A and Galileo E1B CBOC(6,1,1/11) using a low cost GPU is proposed. In the existing method that each GNSS signal is processed within 1 ms, more than 2 ms processing time is required in GPU to process 4 ms CBOC signal. It means that real time operation is possible if only Galileo E1B CBOC signal is concerned. But when both GPS C/A and Galileo CBOC is required, it cannot process GPS C/A signal in real time. To process 1 ms GPS C/A and 4 ms Galileo CBOC signal in real time, 4 ms Galileo CBOC signal is divided into 4 by 1 ms signal block in the proposed method. Specially, a buffer that simultaneously manages 1 ms and 4 ms signals is designed. In addition, a module that accumulates the 1 ms correlation value of the Galileo CBOC by 4 ms and passes it to the PLL and DLL is implemented. The operation and performance are evaluated with real measurements in the GPU based SDR. The experimental results show that tracking of more than 16 satellites of GPS C/A and Galileo E1B is possible using the proposed method.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.7
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• pp.704-712
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• 2016

Recently, the installation of photovoltaic (PV) systems has been increasing due to the worldwide interest in eco-friendly and infinitely abundant solar energy. However, the output power of PV systems is highly influenced by the surrounding environment. For instance, a string of PV systems composed of modules in series may become inoperable under cloudy conditions or when in the shade of a building. In other words, under these conditions, the existing control method of PV systems does not allow the string to be operated in the normal way, because its output voltage is lower than the operating range of the grid connected inverter. In order to overcome this problem, we propose a new control method using a DC-DC voltage regulator which can compensate for the voltage of each string in the PV system. Also, based on the PSIM S/W, we model the DC-DC voltage regulator with constant voltage control & MPPT (Maximum Power Point Tracking) control functions and 3-Phase grid connected inverter with PLL (Phase-Locked Loop) control function. From the simulation results, it is confirmed that the present control method can improve the operating efficiency of PV systems by compensating for the fluctuation of the voltage of the strings caused by the surrounding conditions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6C
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• pp.502-511
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• 2012

As the importance of GNSS system increases, the necessity of independent system is increased also. When the independent GNSS system is required, GNSS signal design is necessary with requirement definition. This paper suggests the design method of GNSS signal using the analysis result of receiver performance. First, the candidates are defined based on the design elements. Then the receiver performance of the candidates is analyzed based on the performance evaluation parameters. The weights of performance evaluation parameter are defined in order to consider the receiver performance in a various aspects. Finally, the calculation of normalized performance evaluation parameters and weights are derived to obtain the compared value for signal selection. Spreading code, modulation method and carrier frequency are considered as design parameters. Also, correlation width, DLL PLL thermal noise jitter, frequency bandwidth and side lobe peak ratio are considered as performance evaluation parameters. And positioning performance, robustness to noise, bandwidth efficiency are considered as the performance aspects. This paper analyzes the performance of each candidate using software based simulator and suggest the method to compare objectively the performance of each candidates.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.401-401
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• 2009

Recently, demands for the development of compact, lightweight power supplies with higher power density and higher efficiency have been increased. Since Piezoelectric Transformer (PT) was emerged in device and material industry, it has been suggested as a viable alternative to the magnetic transformer in some applications. PT has some advantages such as low profile and mechanical energy transfer with little electromagnetic interface (EMI). Also, PT can provide high voltage stepping ratio with good isolation and requires no copper windings saving copper usage especially for large voltage conversion differences. Conventional control of PT converter has mainly two-way. One is the pulse frequency modulation (PFM) control method and the other is the pulse width modulation (PWM) control with frequency fixed method. It is known that the maximum PT efficiency can be obtained when it operates near the resonant frequency of the PT. And, also PT's resonant frequency moves according to the load condition. Therefore, selection of PT converter control method is very difficult. This paper analyzes general piezo-electric converter modeling and proposes a guide-line to selection of control method and stabilization control.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.1
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• pp.63-67
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• 2009

Current mismatch in a charge pump causes degradation in spectral purity of the phase locked loops(PLLs), such as reference spurs. The current mismatch can be reduced by increasing the output resistance of the charge pump, as in a cascoded output stage. However as the supply voltage is lowered, it is hard to stack transistors. In this paper, a new method for reducing the current mismatch is proposed. The proposed method is based on a feed-forward compensation for the channel length modulation effect of the output stage. The new method has been demonstrated through simulations on typical $0.18{\mu}m$ CMOS circuits.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.469-471
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• 2008

The charge pump affects the performance of PLL. In designing the charge pump, we need to consider various issues such as current mismatch, charge sharing, feedthrough, charge injection, and leakage current. This paper propose the new charge pump circuit which is improved in terms of the current match over the existing high-speed charge pump. The simple method used for reducing current mismatch is the technique that uses a cascode in order to increase the output resistance of the charge pump. However the method limits the output voltage range of the charge pump. So the method is hard to apply as the supply voltage is lowered. Thus this paper proposes a new charge pump circuit using an op amp instead of the cascode. And the new charge pump circuit has an excellent current matching characteristics over a wide output range.

• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.250-254
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• 2007

As photovoltaic(PV) power generation systems become more common, it will be necessary to investigate islanding detection method for PV systems. Islanding of PV systems can cause a variety of problems and must be prevented. However, if the real and reactive powers of the load and PV system are closely matched, islanding detection by passive methods becomes difficult. Also, most active methods lose effectiveness when there are several PV systems feeding the same island. The active frequency drift positive feedback method(AFDPF) enables islanding detection by forcing the frequency of the voltage in the island to drift up or down. In this paper the research for the minimum value of chopping fraction gain applied digital phase-locked-loop (DPLL) to AFDPF considering output power quality and islanding prevention performance are performed by simulation and experiment according to IEEE Std 929-2000 islanding test.