• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.191-193
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• 2002

최근, 전기품질에 관한 중요성과 EMI에 의한 규정이 강화되면서 PFC 컨버터에 관한 연구가 많이 이루어지고 있다. 본 연구에서는 matlab을 활용하여 3상 PFC 컨버터를 효율적으로 시뮬레이션하는 연구를 수행한다. 단위역률을 위한 3상 컨버터 PFC 제어는 링크전압제어부, 전류제어부, SVPWM 제어부로 구성된다. 3상 PFC 컨버터를 matlab/simulink로 구성하여 시뮬레이션을 수행한 결과. 상전압과 상전류의 위상이 일치하여 단위역률이 잘 실현됨을 나타내고 있다. 본 연구는 PFC 컨버터의 설계 및 유사회로의 시뮬레이션에 유용하게 활용될 것이다.

• 반도체디스플레이기술학회지
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• 제23권2호
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• pp.50-54
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• 2024

In this paper, we propose a theoretical method to systematically analyze the power conversion efficiency of a single-phase PFC switching rectifier. Boost-type PFC was organized in order of highest correlation with load current using steady-state analysis results and introduced the concept of loss factor. The loss factors for each major element are summarized and presented in a table. This paper makes it easier to understand the internal loss and power conversion efficiency of the rectifier for loss factors. Lastly, to confirm the validity of the efficiency analysis results reflecting the loss factors, loss and efficiency analysis of the 2.5kW PFC rectifier was performed. The results were compared with data from a 2.5kW PFC circuit for evaluation. As a result, the usefulness of power conversion efficiency analysis reflecting the loss factors proposed in this paper was confirmed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.1110-1113
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• 2002

A Single-Stage Single-Switch power-factor- correction(PFC) AC/DC Converter with universal input is presented in this paper. The PFC Converter can be achieved based upon the continuous current mode(CCM). The switch has less current and voltage stresses over a wide range of load variation so that a low voltage rating device can be used. The presented converter features high power factor high efficiency, and low cost. An 90W prototype was implemented to show that it has 70% efficiency with low voltage stress over universal line input.

• Journal of Power Electronics
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• 제18권2호
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• pp.383-394
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• 2018

This paper presents an isolated power factor correction converter for general-purpose electric vehicle chargers with a wide output voltage range. The converter is based on an asymmetrical dual active bridge structure so that the voltage stress of switching devices can be eliminated by transferring the transformer leakage inductance to the circuit parameters. Harmonic and output controls are performed by secondary switches, and primary switches are only operated at a fixed frequency with a 50% duty ratio. A harmonic modulation technique is also adopted to obtain a near-unity power factor without input current monitoring. The feasibility of the proposed charger is verified with a 3.3 kW prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.319-322
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• 1999

This paper presents a novel single-stage Power Factor Corrected(PFC) AC/DC forward converter with semi-automatic current shaping in order to achieve the unity power factor and an isolated output. Since the proposed circuit is combined a boost converter used for PFCs with a forward converter used for DC to DC conversion, the over-all size of system could be reduced. And thanks to the zero voltage switching(ZVS) in both switches, the voltage stress can be reduced considerably. A simple auxiliary circuit adopted into the secondary of transformer is composed of lossless components for reducing surge voltage. A prototype which has tow IGBT(Insulated Gate Bypolar Transistor) modules as switching device is manufactured to evaluate the proposed topology. The characteristics of the proposed circuit are tested, and the validity is verified by experimental results.

• Journal of Power Electronics
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• 제5권3호
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• pp.212-217
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• 2005

In order to correct the power boost topology has been used for easy control. But conventional boost topology has the following drawbacks: switching voltage surge, cross conduction current and right-half-plane zero of its control transfer function. Furthermore, in this topology the output voltage is always higher than the input voltage. As a result, a first-stage boost PFC converter needs to be connected with a second-stage DC-DC converter. A new topology which can be used as single stage PFC converter is proposed in this paper.

• Journal of Power Electronics
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• 제14권4호
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• pp.641-648
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• 2014

This paper presents the design considerations and analysis for an interleaved boundary conduction mode power factor correction buck converter. A thorough analysis of the harmonic content of the AC line current is presented to examine the allowable voltage gain (K value) for meeting the EN61000-3-2, Class D standard while maximizing efficiency. The results of the harmonic analysis are used to derive the required value of K and therefore the output voltage necessary to meet the class D requirements for a given AC line voltage. The discussed design consideration and harmonic current analysis are verified on a 300W universal line experimental prototype converter with an 80V output. The measured efficiencies remain above 96% down to 20% of the full load. The input current harmonics also meet the IEC61000-3-2 (class D) standard.

• 전자공학회논문지SC
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• 제44권6호
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• pp.57-65
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• 2007

본 논문에서는 DSP(TMS320F2812)를 사용하여 단상 역률개선을 디지털로 설계하였다. 이러한 승압형 역률개선 컨버터를 디지털로 구현하기 위하여 DSP는 컨버터의 입력전압과 인덕터전류, 컨버터의 출력전압이 필요하며 이를 DSP 내부에 있는 12비트 A/D변환기로 구현하였다. 승압을 위한 스위칭소자인 FET가 ON/OFF 될 때 심한 고주파 노이즈와 스위칭 리플이 발생한다. DSP에 의해 구현시 어느 시점에서 A/D 변환을 시작할지 결정하는 것은 대단히 중요하며 스위칭 노이즈가 발생하지 않는 곳에서 A/D 변환을 할 필요가 있다. PWM의 시비율(duty ratio)은 약 5 %에서 95 %까지 가변적이기 때문에 A/D 변환의 고정된 시작점을 찾을 수는 없다. 따라서 본 논문에서는 25 us 마다 PWM의 ON/OFF 폭을 미리 예측한 후 타이머를 이용하여 A/D 변환을 하도록 하였다. 실험 결과들로부터 광범위한 입력전압에 대하여 약 0.99의 역률과 80 Vdc 출력 전압에 대한 리플이 약 5 Vpp임을 확인하였다. 또한 윈도우즈 Xp 환경 하에서 수행되는 응용프로그램을 작성하여 원격에서 단상 PFC 컨버터의 각종 파라미터들과 전압 및 전류 제어기의 이득들을 모니터링하며 원격제어가 가능함을 보여 상용화의 가능성과 유용성을 제시하였다.

• 전기학회논문지
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• 제65권12호
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• pp.2000-2007
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• 2016

Generally, in order to implement the CRM(Critical Conduction Mode), the analog controller is used rather than a digital controller because the control is simple and uses less power. However, according to the semiconductor technology development and various user needs, digital control system based on a DSP is on the rise. Therefore, in this paper, the CRM bridgeless PFC converter based on a digital control is proposed. It is necessary to detect the inductor current when it reaches zero and peak value, for calculating the on time and off time by using the current information. However, in this paper, the on-time and off-time are calculated by using the proposed algorithm without any current information. If the switching-times are calculated through the steady-state analysis of the converter, they do not reflect transient status such as starting-up. Therefore, the calculated frequency is out of range, and the transient current is generated. In order to solve these problems, limitation method of the on-time and off-time is used, and the limitation values are varied according to the voltage reference. In addition, in steady state, depending on the switching frequency, the inductance is varied because of the resonance between the inductor and the parasitic capacitance of the switching elements. In order to solve the problem, inductance are measured depending on the switching frequency. The measured inductance are used to calculate the switching time for preventing the transient current. Simulation and experimental results are presented to verify the proposed method.

• 전력전자학회논문지
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• 제20권3호
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• pp.214-222
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• 2015

The superiority of gallium nitride FET (GaN FET) over silicon MOSFET is examined in this paper. One of the outstanding features of GaN FET is low reverse-recovery charge, which enables continuous conduction mode operation of totem-pole bridgeless boost power factor correction (PFC) circuit. Among many bridgeless topologies, totem-pole bridgeless shows high efficiency and low conducted electromagnetic interference performance, with low cost and simple control scheme. The operation principle, control scheme, and circuit implementation of the proposed topology are provided. The converter is driven in two-module interleaved topology to operate at a power level of 5.5 kW, whereas phase-shedding control is adopted for light load efficiency improvement. Negative bias circuit is used in gate drivers to avoid the shoot-through induced by high speed switching. The superiority of GaN FET is verified by constructing a 5.5 kW prototype of two-module interleaved totem-pole bridgeless boost PFC converter. The experiment results show the highest efficiency of 98.7% at 1.6 kW load and an efficiency of 97.7% at the rated load.