• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.7
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• pp.708-712
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• 2004

Shallow $p^+-n$ junctions were formed by ion implantation and dual-step annealing processes. The dopant implantation was performed into the crystalline substrates using BF$_2$ ions. The annealing was performed with a rapid thermal processor and a furnace. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of junction depth and sheet resistance. A new simulator is designed to model boron diffusion in silicon. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. Using initial conditions and boundary conditions, coupled diffusion equations are solved successfully. The simulator reproduced experimental data successfully.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.86-86
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• 2012

The new approaches for silicon solar cell of new concept have been actively conducted. Especially, solar cells with wire array structured radial p-n junctions has attracted considerable attention due to the unique advantages of orthogonalizing the direction of light absorption and charge separation while allowing for improved light scattering and trapping. One-dimenstional semiconductor nano/micro structures should be fabricated for radial p-n junction solar cell. Most of silicon wire and/or pillar arrays have been fabricated by vapour-liquid-solid (VLS) growth because of its simple and cheap process. In the case of the VLS method has some weak points, that is, the incorporation of heavy metal catalysts into the growing silicon wire, the high temperature procedure. We have tried new approaches; one is electrochemical etching, the other is noble metal catalytic etching method to overcome those problems. In this talk, the silicon pillar formation will be characterized by investigating the parameters of the electrochemical etching process such as HF concentration ratio of electrolyte, current density, back contact material, temperature of the solution, and large pre-pattern size and pitch. In the noble metal catalytic etching processes, the effect of solution composition and thickness of metal catalyst on the etching rate and morphologies of silicon was investigated. Finally, radial p-n junction wire arrays were fabricated by spin on doping (phosphor), starting from chemical etched p-Si wire arrays. In/Ga eutectic metal was used for contact metal. The energy conversion efficiency of radial p-n junction solar cell is discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.6
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• pp.372-375
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• 2017

ZnO thin films were deposited by RF magnetron sputtering and then diffused by using an As source in the ampouletube. Also, the ZnO p-n homojunction was made by using As-doped ZnO thin films, and its properties were analyzed. After the As doping, the surface roughness increased, the crystal quality deteriorated, and the full width at half maximum was increased. The As-doped ZnO thin films showed typical p-type properties, and their resistivity was as low as $2.19{\times}10^{-3}{\Omega}cm$, probably because of the in-diffusion from an external As source and out-diffusion from the GaAs substrate. Also, the ZnO p-n junction displayed the typical rectification properties of a p-n junction. Therefore, the As diffusion method is effective for obtaining ZnO films with p-type properties.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.9-18
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• 2005

Analytical expressions for breakdown voltages of abrupt $p^{+}n$ junction of Si, GaAs, InP and In$In_{0.53}Ga_{0.47}AS$ were induced. Getting analytical breakdown voltages, effective ionization coefficients were extracted using lucky drift parameters of Marsland for each materials. The results of analytical breakdown voltages followed by ionization integral agreed well with experimental result within 10$\%$ in error for the doping concentration in the range of $10^{14}cm\;^{-3}\~5\times10\;^{17}cm\;^{-3}$.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.315.1-315.1
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• 2014

The use of cellulose papers has recently attracted much attention in various device applications owing to their natural advantageous properties of earth's abundance, bio-friendly, large-scale production, and flexibility. Conventional metal oxides with novel structures of nanorods, nanospindles, nanowires and nanobelts are being developed for emerging electronic and chemical sensing applications. In this work, both ZnO (n-type) nanorod arrays (NRAs) and CuO (p-type) nanospindles (NSs) were synthesized on cellulose papers and the p-n junction property was investigated using the electrode of indium tin oxide coated polyethylene terephthalate film. To synthesize ZnO and CuO nanostructures on cellulose paper, a simple and facile hydrothermal method was utilized. First, the CuO NSs were synthesized on cellulose paper by a simple soaking process, yielding the well adhered CuO NSs on cellulose paper. After that, the ZnO NRAs were grown on CuO NSs/cellulose paper via a facile hydrothermal route. The as-grown ZnO/CuO NSs on cellulose paper exhibited good crystalline and optical properties. The fabricated p-n junction device showed the I-V characteristics with a rectifying behaviour.

• Korean Journal of Materials Research
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• v.6 no.7
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• pp.678-683
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• 1996

In the fabrication processes of thin film thermoelectrics, a subsequent annealing treatment is inevitable to reduce the defects and residual stresses introduced during the film growth, and to make the uniform carrier concentration of the film. However, the diffusion-induced atomic redistribution and the broadening of p/n junction region are expected to affect the thermoelectric properties of thin film modules. The present study intends to investigate the diffusion at the p/n junctions of thermoelectric thin films and to relate it to the property changes. The film junctions of p-type(Bi0.5Sb1.5Te3)and n-type(Bi2Te2.4Se0.6)were prepared by the flash evaporation method. Aluminum thin layer was employed as a diffusion barrier between p-and n-type films of the junction. This was found to be an effective barrier by showing a negligible diffusion into both type films. After annealing treatment, the thermoelectric properties of p/n couples with aluminum barrier layer were accordingly retained their properties without any deterioration.

• Transactions on Electrical and Electronic Materials
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• v.3 no.2
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• pp.10-15
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• 2002

In this paper, the electrical characteristics of fabricated p+-n junction diode are demonstrated and interpreted with different theoretical calculations. Dopants distribution by boron ion implantation on silicon wafer were simulated with TRIM-code and ICECaEM simulator. In order to make electrical activation of implanted carriers, thermal annealing treatments are carried out by RTP method for 1min. at $1000^{circ}C$ under inert $N_2$ gas condition. In this case, profiles of dopants distribution before and after heat treatments in the substrate are observed from computer simulations. In the I-V characteristics of fabricated diodes, an analytical description method of a new triangular junction model is demonstrated and the results with calculated triangular junction are compared with measured data and theoretical calculated results of abrupt junction. Forward voltage drop with new triangular junction model is lower than the case of abrupt junction model. In the C-V characteristics of diode, the calculated data are compared with the measured data. Another I-V characteristics of diodes are measured after proton implantation in electrical isolation method instead of conventional etching method. From the measured data, the turn-on characteristics after proton implantation is more improved than before proton implantation. Also the C-V characteristics of diode are compared with the measured data before proton implantation. From the results of measured data, reasonable deviations are showed. But the C-V characteristics of diode after proton implantation are deviated greatly from the calculated data because of leakage currents in defect regions and layer shift of depletion by proton implantation.

• Journal of the Korean Vacuum Society
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• v.6 no.4
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• pp.326-336
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• 1997

From the concept that the ion implantation-induced defect is one of the major factors in determining source/drain junction characteristics, high quality ultra-shallow $p^+$-n junctions were formed through the control of ion implantation-induced defects in silicon substrate. In conventional process of the junction formation. $p^+$ source/drain junctions have been formed by $^{49}BF_2^+$ ion implantation followed by the deposition of TEOS(Tetra-Ethyl-Ortho-Silicate) and BPSG(Boro-Phospho-Silicate-Glass) films and subsequent furnace annealing for BPSG reflow. Instead of the conventional process, we proposed a series of new processes for shallow junction formation, which includes the additional low temperature RTA prior to furnace annealing, $^{49}BF_2^+/^{11}B^+$ mixed ion implantation, and the screen oxide removal after ion implantation and subsequent deposition of MTO (Medium Temperature CVD oxide) as an interlayer dielectric. These processes were suggested to enhance the removal of ion implantation-induced defects, resulting in forming high quality shallow junctions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.286-289
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• 2003

In the case of high voltage devices, junction termination plays an important role in determining the breakdown voltage of the device. The mesa junction termination has been demonstrated to yield nearly ideal breakdown voltage for 6H-SiC p-n junctions. However, such an approach may not be attractive because of the nonplanar surface, which is difficult to passivate. Moreover, In case of 4H-SiC, ideal breakdown voltage could not be achieved using mesa junction termination. For 4H-SiC planar junction termination technique is more useful one rather than mesa junction termination. In this paper, breakdown characteristics of the 4H-SiC device with planar junction termination, such as FLR(Field Limiting Ring), FP(Field Plate) and JTE(Junction Termination Extension), is presented. In the case of the FLR, breakdown voltage of 1800V is obtained. And breakdown voltage of 1000V and 1150V is also obtained for the case of FP and JTE case, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.195-196
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• 2009

This paper describes the fabrication and characteristics of polycrystalline 3C-SiC thin film diodes for extreme environment applications, in which the this thin film was deposited onto oxidized Si wafers by APCVD using HMDS In this work, the optimized growth temperature and HMDS flow rate were $1,100^{\circ}C$ and 8sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/$SiO_2$/Si(n-type) structure was fabricated and its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84V, over 140V, 61nm, and $2.7{\times}10^{19}cm^2$, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and $500^{\circ}C$ for 30min under a vacuum of $5.0{\times}10^{-6}$Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.