• 제목/요약/키워드: Oxide loss

검색결과 481건 처리시간 0.029초

Study on Engineering Barrier Role in Nuclear Waste Disposal

  • Hua, Zhang;Jianwen, Yang;Baojun, Li;Shanggeng, Luo
    • 한국방사성폐기물학회:학술대회논문집
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    • 한국방사성폐기물학회 2004년도 Proceedings of the 4th Korea-China Joint Workshop on Nuclear Waste Management
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    • pp.73-82
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    • 2004
  • This paper studies the leaching behaviors of pyrochlore-rich synroc incorporated 46.8wt% simulated actinides waste under the five simulated geological disposal media, which included the bentonite, granite, granite + ferroferric oxide, granite + cement, bentonite + ferroferric oxide, respectively. The mass loss rates reached to equilibrium after 182 day and was 10-7 g/$\textrm{mm}^2{\cdot}d$. That suggests the mass loss rate of pyrochlore-rich synroc, loaded 46.8wt% actinides waste, was very low. The surfaces of the leached specimens were analyzed by XRD, SEM/EDS. The experimental results show that the pyrochlore-rich synroc samples in the systems, which contained bentonite and cement, have two new phases formed on the leached specimens surface at $90^{\circ}C$ for 728d; The bentonite and cement can retard the elements leaching; $Fe_3O_4$ can speed the elements leaching; Expect for Ti ion depleted on the sample surface, other ion, such as U, Zr, AI, Ca, were in equable states and Ba ion was enriched during test time, which indicated the simulated disposal media have good ability to retard the leaching behavior of the pyrochlore-rich synroc.

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Pb($Zn_{1/3}Nb_{2/3})O_3-Pb(Zr_xTi{1-x})O_3$세라믹의 구조적, 전기적 특성 (Structure and Electrical Properties of Pb($Zn_{1/3}Nb_{2/3})O_3-Pb(Zr_xTi{1-x})O_3$ Ceramics)

  • 조현무;이성갑;이영희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.357-360
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    • 2000
  • Ferroelectric 0.05PZN-xPZT(90/10)-(0.95-x)PZT(10/90) (x=0.65, 0.85) specimens were fabricated by the mixed-oxide method and cold-pressing method using sol-gel derived PZT(90/10) and PZT(10/90) powders. All specimens show a uniform ferroelectric grain without the presence of the pyrocholre phase. Average grain size increased with an increase in sintering temperature, the value for the x=0.65 specimen sintered at 125$0^{\circ}C$ was 14.4${\mu}{\textrm}{m}$. The dielectric constant and dielectric loss of the x=0.65 specimen sintered at 125$0^{\circ}C$ were 1247, 2.05%, respectively. All specimens showed fairly good temperature and frequency stability of dielectric constant with the range from -2$0^{\circ}C$ to 6$0^{\circ}C$ and 100Hz to 10MHz. The coercive electric field and the remanent polarization of x = 0.65 specimen sintered at 125$0^{\circ}C$ were 8.5 kV/cm and 13 $\mu$C/cm$^2$, respectively.

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전계방출 투과전자현미경 분석기술을 이용한 Cu 입자 표면산화층의 정밀평가 (Precise Analysis of the Surface Oxidation Layer on Cu Powders Using FE-TEM Techniques)

  • 이태훈;유정호;현문섭;양준모;성미린;권진형;이선영;김정선;백경호
    • 대한금속재료학회지
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    • 제48권1호
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    • pp.57-61
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    • 2010
  • Nanosized surface structures of Cu powders were investigated at the atomic scale by field-emission transmission electron microscope techniques. The nanoscale surface oxide layer on the Cu powder was analyzed to be the $CU_2O$ phase by electron diffraction pattern and electron energy-loss spectroscopy. In addition, it was found from high-resolution transmission electron microscopy study that there are formed no surface oxide layers on the surface of alkanethiol coated Cu powders.

Performance Evaluation of GaN-Based Synchronous Boost Converter under Various Output Voltage, Load Current, and Switching Frequency Operations

  • Han, Di;Sarlioglu, Bulent
    • Journal of Power Electronics
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    • 제15권6호
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    • pp.1489-1498
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    • 2015
  • Gallium nitride (GaN)-based power switching devices, such as high-electron-mobility transistors (HEMT), provide significant performance improvements in terms of faster switching speed, zero reverse recovery, and lower on-state resistance compared with conventional silicon (Si) metal-oxide-semiconductor field-effect transistors (MOSFET). These benefits of GaN HEMTs further lead to low loss, high switching frequency, and high power density converters. Through simulation and experimentation, this research thoroughly contributes to the understanding of performance characterization including the efficiency, loss distribution, and thermal behavior of a 160-W GaN-based synchronous boost converter under various output voltage, load current, and switching frequency operations, as compared with the state-of-the-art Si technology. Original suggestions on design considerations to optimize the GaN converter performance are also provided.

$ZrO_2$첨가량에 따른 BSCT 세라믹의 유전특성 (Dielectric properties with variation of doped mount $ZrO_2$ of BSCT ceramics)

  • 조현무;이성갑;이영희;배선기
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.153-156
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    • 2001
  • (Ba$_{0.6-x}$Sr$_{0.4}$Ca$_{x}$)TiO$_3$ (x=0.10, 0.15, 0.20) ceramics were fabricated by the mixed-oxide method and their dielectric properties were investigated with variation of composition ratio, doped ZrO$_2$ (0.5, 1.0, 1.5, 2.0, 3.0 wt%) and sintered at 145$0^{\circ}C$. The dielectric constant and loss of the x=0.10 specimen applied field were 19.86 and 0.302 % at 0 V/cm, and 25.937 and 0.339 % at 300 V/cm, respectively. Dielectric constant were increased with increased applied field and decreased with increased frequency, and dielectric loss were within 0.1% at applied 800 MHz, respectively. all specimens showed fairly good applied field. Although, dielectric constant and loss of all specimen showed to tend of nearly the same. same.

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식각 용기 가열에 의한 라디칼 손실 제어가 고선택비 산화막 식각에 미치는 영향 (Effect of the Radical Loss Control by the Chamber Wall Heating on the Highly Selective $SiO_2$ etching)

  • 김정훈;이호준;주정훈;황기웅
    • 한국진공학회지
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    • 제5권2호
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    • pp.169-174
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    • 1996
  • The applications of the high density plasma sources to the etching in semiconductor fabrication process are actively studied because of the more strict requirement from the dry etching process due to shrinking down of the critical dimension. But in the oxide etching with the high density plasma sources, abundant fluorine atoms released from the flurocarbon feed gas make it difficult to get the highly selective $SiO_2/Si$ etching. In this study, to improve the $SiO_2/Si$ etch selectivity through the control of the radical loss channels, we propose the wall heating , one of methods of controlling loss mechanisms. With appearance mass spectroscopy(AMS) and actinometric optical emission spectroscopy(OES), the increase of both radicals impinging on the substrate and existing in bulk plasma, and the decrease of the fluorine atom with wall temperature are observed. As a result, a 40% improvement of the selectivity was achieved for the carbon rich feed gas.

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SOI 및 TRENCH 구조를 이용한 저소비 전력형 미세발열체의 설계 (Design of Low Consume Power Ty7e Micro-heaters Using SOl and Trench Structures)

  • 장수;홍석우;이종춘;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 추계학술대회 논문집
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    • pp.350-353
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    • 1999
  • This Paper Presents the optimized design of micro-heaters using 501(Si-on-insulator) substrate and oxide-filled trench structure In order to justify a lumped model approximation and thermal boundary assumptions, two-dimensional FDM(finite difference among which conduction is the dominant heat dissipation path. Compared with no-trenchs on the SOI structure, the micro-heaters with trench structures has properties of low heater loss and good thermal isolation. The simulation results show that the heater loss decreases as the number. width and distance of trenchs increases.

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CoolSiCTM SiC MOSFET Technology, Device and Application

  • Ma, Kwokwai
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2017년도 전력전자학술대회
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    • pp.577-595
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    • 2017
  • ${\bullet}$ Silicon Carbide (SiC) had excellent material properties as the base material for next generation of power semiconductor. In developing SiC MOSFET, gate oxide reliability issues had to be first overcome before commercial application. Besides, a high and stable gate-source voltage threshold $V_{GS(th)}$ is also an important parameter for operation robustness. SiC MOSFET with such characteristics can directly use existing high-speed IGBT gate driver IC's. ${\bullet}$ The linear voltage drop characteristics of SiC MOSFET will bring lower conduction loss averaged over full AC cycle compared to similarly rate IGBT. Lower switching loss enable higher switching frequency. Using package with auxiliary source terminal for gate driving will further reduce switching losses. Dynamic characteristics can fully controlled by simple gate resistors. ${\bullet}$ The low switching losses characteristics of SiC MOSFET can substantially reduce power losses in high switching frequency operation. Significant power loss reduction is also possible even at low switching frequency and low switching speed. in T-type 3-level topology, SiC MOSFET solution enable three times higher switching freqeuncy at same efficiency.

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GaN FET 기반 동기정류기를 적용한 저전압-대전류 DC-DC Converter 효율예측 (A Study on the Efficiency Prediction of Low-Voltage and High-Current dc-dc Converters Using GaN FET-based Synchronous Rectifier)

  • 정재웅;김현빈;김종수;김남준
    • 전력전자학회논문지
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    • 제22권4호
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    • pp.297-304
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    • 2017
  • The purpose of this paper is to analyze losses because of switching devices and the secondary side circuit diodes of 500 W full bridge dc-dc converter by applying gallium nitride (GaN) field-effect transistor (FET), which is one of the wide band gap devices. For the detailed device analysis, we translate the specific resistance relation caused by the GaN FET material property into algebraic expression, and investigate the influence of the GaN FET structure and characteristic on efficiency and system specifications. In addition, we mathematically compare the diode rectifier circuit loss, which is a full bridge dc-dc converter secondary side circuit, with the synchronous rectifier circuit loss using silicon metal-oxide semiconductor (Si MOSFET) or GaN FET, which produce the full bridge dc-dc converter analytical value validity to derive the final efficiency and loss. We also design the heat sink based on the mathematically derived loss value, and suggest the heat sink size by purpose and the heat divergence degree through simulation.

IGBT 기반 인덕턴스 및 문턱전압 변화에 따른 초퍼 회로의 연구 (A Study on Chopper Circuit for Variation of Inductance and Threshold Voltage based on IGBT)

  • 노영환
    • 한국철도학회논문집
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    • 제13권5호
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    • pp.504-508
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    • 2010
  • 고전압 절연 게이트 바이폴라 트랜지스터 (IGBT)의 개발로 기존의 GTO(Gate Turnoff Thyristor)가 적용되는 분야에서 더 효율적인 새로운 소자로 인정받고 있다. IGBT는 금속 산화막 반도체 트랜지스터(MOSFET)와 바이폴라 전력 트랜지스터의 장점을 결합한 소자이다. IGBT의 전기적 특성의 변화는 주로 입력단자에 MOSFET와 출력단자에 PNP 트랜지스터의 특성에 달려있다. IGBT의 가장 중요한 설계변수중의 하나인 문턱전압의 변화는 방사선이 존재하는 환경에 게이트 산화막(oxide)에서 전하포획(charge trapping)에 의해 발생되고 에너지 손실을 야기시킨다. 또한, 에너지 손실은 초퍼회로의 인덕턴스 값이 변화될 때 발생됨을 연구한다. 본 논문에서 IGBT의 전기적 특성을 SPICE로 시뮬레이션하고, IGBT 기반 인덕턴스와 문턱전압의 변화에 따른 전기적 특성을 분석하고자 한다.