• Membrane Journal
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• v.6 no.2
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• pp.72-78
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• 1996

This paper was to investigate the preparation of quaternary ammonium polysulfone. The aminated polysullone (AMPS) as quaternary ammonium polysulfone was synthesized by two-step process. The first step involves the preparation of chloromethylated polysulfone (CMPS) which was produced by the introducion of chloromethyl group into polysulfone using chloromethyl methyl ether as a chloromethylation agent and zinc oxide as a catalyst. The second step, amination of CMPS was to give rise to AMPS using triethylamine.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.102-109
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• 2000

It is difficult to meet the cleanliness requirement of $10^{10}/\textrm{cm}^2$ for the giga level device fabrication with mechanical cleaning techniques like scrubbing which is widely used to remove the particles generated during Chemical Mechanical Polishing (CMP) processes. Therefore, the second cleaning process is needed to remove metallic contaminants which were not completely removed during the mechanical cleaning process. In this paper the experimental results for the removal of the metallic contaminants existing on the wafer surface using remote plasma $H_2$ cleaning and UV/$O_3$ cleaning techniques are reported. In the remote plasma $H_2$ cleaning the efficiency of contaminants removal increases with decreasing the plasma exposure time and increasing the rf-power. Also the optimum process conditions for the removal of K, Fe and Cu impurities which are easily found on the wafer surface after CMP processes are the plasma exposure time of 1min and the rf-power of 100 W. The surface roughness decreased by 30-50 % after remote plasma $H_2$ cleaning. On the other hand, the highest efficiency of K, Fe and Cu impurities removal was achieved for the UV exposure time of 30 sec. The removal mechanism of the metallic contaminants like K, Fe and Cu in the remote plasma $H_2$ and the UV/$O_3$ cleaning processes is as follows: the metal atoms are lifted off by $SiO^*$ when the $SiO^*$is evaporated after the chemical $SiO_2$ formed under the metal atoms reacts with $H^+ \; and\; e^-$ to form $SiO^*$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.487-487
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• 2009

One of the critical consumables in chemical mechanical polishing (CMP) is a specialized solution or slurry, which typically contains both abrasives and chemicals acting together to planarize films. In single abrasive slurry (SAS), the solid phase consists of only one type of abrasive particle. On the other hand, mixed abrasive slurry (MAS) consists of a mixture of at least two types of abrasive particles. In this paper, we have studied the CMP characteristics of mixed abrasive slurry (MAS) retreated by adding of $CeO_2$ abrasives within 1:10 diluted silica slurry (DSS). The slurry designed for optimal performance should produce reasonable removal rates, acceptable polishing selectivity with respect to the underlying layer, low surface defects after polishing, and good slurry stability. The modified abrasives in MAS are evaluated with respect to their particle size distribution, surface morphology, and CMP performances such as removal rate and non-uniformity. As an experimental result, we obtained the comparable slurry characteristics compared with original silica slurry in the viewpoint of high removal rate and low non-uniformity.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.3
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• pp.289-294
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• 2012

There are several indicators to represent characteristics of chemical mechanical planarization (CMP) such as material removal rate (MRR), surface quality and removal uniformity on a wafer surface. Especially, the removal uniformity on the wafer edge is one of the most important issues since it gives a significant impact on the yield of chip production on a wafer. Non-uniform removal rate at the wafer edge (edge effect) is mainly induced by a non-uniform pressure from nonuniform pad curvature during CMP process, resulting in edge exclusion which means the region that cannot be made to a chip. For this reason, authors tried to minimize the edge exclusion by using an edge profile control (EPC) ring. The EPC ring is equipped on the polishing head with the wafer to protect a wafer from the edge effect. Experimental results showed that the EPC ring could dramatically minimize the edge exclusion of the wafer. This study shows a possibility to improve the yield of chip production without special design changes of the CMP equipment.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1327-1329
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• 1998

It is very important to select superior inter-layer PMD(Pre Metal Dielectric) materials which can act as penetration barrier to various impurities created by CMP processes. In this paper, hot carrier degradation and device characteristics were studied with material variation of PMD-1 layers, which were split by LP-TEOS, SR-Oxide, PE-Oxynitride, PE-Nitride, PE-TEOS films. It was observed that the oxynitride and nitride using plasma was greatly decreased in hot carrier effect in comparison with silicon oxide. Consequently, silicon oxide turned out to be a better PMD-1 material than PE-oxynitride and PE-nitride. Also, LP-TEOS film was the best PMD-1 material Among the silicon oxides.

• Korean Journal of Materials Research
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• v.15 no.12
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• pp.818-823
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• 2005

Sub-micron colloidal silica particles coated with nano-sized ceria were prepared by mixing of its silica and cerium salts hydrolysis, and modified by hydrothermal reaction. By using the slurries with and without hydrothermal modification containing above particles, oxide film coated on silicon wafer was polished. The modified slurries had higher polish rate due to increase of ceria fraction to silica through hydrothermal reaction. They revealed higher stability in wide range of pH $2\~10$ than ceria coated silica slurries without its modification.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.193-194
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• 2005

By the high-temperature pad conditioning process: The slurry residues in pores and grooves of the polishing pad were clearly removed. These clear pores and enlarged grooves made the slurry attack the oxide surface. The changed slurry properties by high-temperature pad conditioning process made the oxide surface hydro-carbonate to be removed easily.

• Proceedings of the Materials Research Society of Korea Conference
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• 2006.11a
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• pp.15.1-15.1
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• 2006

• Transactions on Electrical and Electronic Materials
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• v.7 no.4
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• pp.167-172
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• 2006

Submicron colloidal silica coated with ceria were prepared by mixing of silica and nano ceria particles and modified by hydrothermal reaction. The polishing efficiency of the ceria coated silica slurry was tested over oxide film on silicon wafer. By changing the polishing pressure in the range of $140{\sim}420g/cm^2$ with the ceria coated silica slurries in $100{\sim}300nm$, rates, WIWNU and friction force were measured. The removal rate was in the order of 200, 100, and 300 nm size silica coated with ceria. It was known that the smaller particle size gives the higher removal rate with higher contact area in Cu slurry. In the case of oxide film, the indentation volume as well as contact area gives effect on the removal rate depending on the size of abrasives. The indentation volume increase with the size of abrasive particles, which results to higher removal rate. The highest removal rate in 200 nm silica core coated with ceria is discussed as proper combination of indentation and contact area effect.

• Journal of the Korea Society for Simulation
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• v.11 no.1
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• pp.23-30
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• 2002

An STI(Shallow Trench Isolation) by using a CMP(Chemical Mechanical Polishing) process has been one of the key issues in the device isolation[1] In this paper we fabricated N, P-MOSFEET tall analyse hump characteristics in various rounding oxdation thickness(ex : Skip, 500, 800, 1000$\AA$). As a result we found that hump occurred at STI channel edge region by field oxide recess. and boron segregation(early turn on due to boron segregatiorn at channel edge). Therefore we improved that hump occurrence by increased oxidation thickness, and control field oxide recess( 20nm), wet oxidation etch time(19HF,30sec), STI nitride wet cleaning time(99HF, 60sec+P 90min) and fate pre-oxidation cleaning time (U10min+19HF, 60sec) to prevent hump occurring at STI channel edge.