• Title/Summary/Keyword: Orthogonal Loop

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Characteristics of Optical Current Sensors by Sensor Design

  • Kim, Young-Min;Park, Jung-Hwan;Lee, Kwang-Sik;Kim, Jung-Bae;Park, Won-Zoo
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.4
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    • pp.80-87
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    • 2007
  • This paper will suggest that the 1 cross orthogonal loop type sensor improves on the orthogonal loop form sensor-head, which is available a calibration of the linear birefringence, when a fiber optic current sensor was composed. An output characteristics of the 1 cross orthogonal loop form, a general closed loop form, the orthogonal loop form are compared by the IEC(International Electrotechnical Commission) 60044-8 standard, and the state of polarization is compared with three forms. As a result, when the closed loop form was changed to the orthogonal loop form, retardation decreased 15.3[%]. When the closed loop form was changed to the 1 cross orthogonal loop type, the retardation decreased 33.8[%]. As a result of the Faraday Effect measurement, the 1 cross orthogonal loop form has the highest output characteristic and the lowest error ratio. It met the 0.5 class of the IEC 60044-8 standard. Thus, in application of the 1cross orthogonal loop form, the possibility to develop high reliability fiber optic current sensors that have a high output and stable error ratio rises is increased.

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

  • Huang, Xiaojiang;Dong, Lei;Xiao, Furong;Liao, Xiaozhong
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.310-318
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    • 2016
  • This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

Design of Low Update Rate Phase Locked Loops with Application to Carrier Tracking in OFDM Systems

  • Raphaeli Dan;Yaniv Oded
    • Journal of Communications and Networks
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    • v.7 no.3
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    • pp.248-257
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    • 2005
  • In this paper, we develop design procedures for carrier tracking loop for orthogonal frequency division multiplexing (OFDM) systems or other systems of blocked data. In such communication systems, phase error measurements are made infrequent enough to invalidate the traditional loop design methodology which is based on analog loop design. We analyze the degradation in the OFDM schemes caused by the tracking loop and show how the performance is dependent on the rms phase error, where we distinguished between the effect of the variance in the average phase over the symbol and the effect of the phase change over the symbol. We derive the optimal tracking loop including optional delay in the loop caused by processing time. Our solution is general and includes arbitrary phase noise apd additive noise spectrums. In order to guarantee a well behaved solution, we have to check the design against margin constraints subject to uncertainties. In case the optimal loop does not meet the required margin constraints subjected to uncertainties, it is shown how to apply a method taken from control theory to find a controller. Alternatively, if we restrict the solution to first or second order loops, we give a simple loop design procedure which may be sufficient in many cases. Extensions of the method are shown for using both pilot symbols and data symbols in the OFDM receiver for phase tracking. We compare our results to other methods commonly used in OFDM receivers and we show that a large improvement can be gained.

A Novel Fast Open-loop Phase Locking Scheme Based on Synchronous Reference Frame for Three-phase Non-ideal Power Grids

  • Xiong, Liansong;Zhuo, Fang;Wang, Feng;Liu, Xiaokang;Zhu, Minghua;Yi, Hao
    • Journal of Power Electronics
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    • v.16 no.4
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    • pp.1513-1525
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    • 2016
  • Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

On Semisimple Representations of the Framed g-loop Quiver

  • Choy, Jaeyoo
    • Kyungpook Mathematical Journal
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    • v.57 no.4
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    • pp.601-612
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    • 2017
  • Let Q be the frame g-loop quiver, i.e. a generalized ADHM quiver obtained by replacing the two loops into g loops. The vector space M of representations of Q admits an involution ${\ast}$ if orthogonal and symplectic structures on the representation spaces are endowed. We prove equivalence between semisimplicity of representations of the ${\ast}-invariant$ subspace N of M and the orbit-closedness with respect to the natural adjoint action on N. We also explain this equivalence in terms of King's stability [8] and orthogonal decomposition of representations.

Omnidirectionally Beam-Steerable Orthogonal Loop Resonator with Switch for Wireless Power Transfer (무선전력전송용 스위치가 장착된 직교루프 전방향 빔조향 공진기)

  • Choi, Bo-Hee;Lee, Jeong-Hae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.300-304
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    • 2015
  • This paper presents an omnidirectionally beam-steerable orthogonal loop resonator for wireless power transfer. The resonator is composed of two orthogonal loops. These connections of two loops and the current direction on the loops are determined by the control of switch. The magnetic field direction is determined by the vector sum of each loop current. The beam is steerable to eight directions by four switch modes. Using the suitable switch mode, the simulation and measurement efficiencies in the whole azimuthal direction are 56.3~60.0 %(deviation 3.7 %) and 41.2~48.7 %(deviation 7.5 %), respectively. The results show a little variation of transmission efficiency in the azimuthal direction.

A Novel Phase Locked Loop for Grid-Connected Converters under Non-Ideal Grid Conditions

  • Yang, Long-Yue;Wang, Chong-Lin;Liu, Jian-Hua;Jia, Chen-Xi
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.216-226
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    • 2015
  • Grid synchronization is one of the key techniques for the grid-connected power converters used in distributed power generation systems. In order to achieve fast and accurate grid synchronization, a new phase locked loop (PLL) is proposed on the basis of the complex filter matrixes (CFM) orthogonal signal generator (OSG) crossing-decoupling method. By combining first-order complex filters with relation matrixes of positive and negative sequence voltage components, the OSG is designed to extract specific frequency orthogonal signals. Then, the OSG mathematical model is built in the frequency-domain and time-domain to analyze the spectral characteristics. Moreover, a crossing-decoupling method is suggested to decouple the fundamental voltage. From the eigenvalue analysis point of view, the stability and dynamic performance of the new PLL method is evaluated. Meanwhile, the digital implementation method is also provided. Finally, the effectiveness of the proposed method is verified by experiments under unbalanced and distorted grid voltage conditions.

A Closed Loop Orthogonal Space-Time Block Code for Maximal Channel Gains (최대의 채널 이득을 위한 폐루프 직교 시공간 블록 부호)

  • Lee, Ki-Ho;Kim, San-Hae;Shin, Yo-An
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.12
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    • pp.13-19
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    • 2008
  • In this paper, we propose a new CL-OSTBC (Closed Loop Orthogonal Space-Time Block Code) scheme for four transmit antennas and compare the scheme with existing closed loop schemes on the performance of BER (Bit Error Rate). In the proposed scheme, a transmitter receives channel feedback information and combines modulated symbols by the symbol combiner, and transmits the symbols encoded by the space-time block encoder. As a result, the proposed scheme achieves full-rate and maximal channel gains by more efficient utilization of the channel feedback information. Moreover, the scheme can reduce computation complexity by using a linear detector. Simulation results on the BER performance show that the proposed CL-OSTBC scheme outperforms existing CL-OSTBC schemes.

Characteristic of Optical Current Sensors Output by Sensor design (센서 형태에 따른 광전류센서의 출력 특성)

  • Kim, Young-Min;Park, Jung-Hwan;Lee, Kwang-Sik;Kim, Jung-Bae;Park, Won-Zoo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2007.05a
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    • pp.342-345
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    • 2007
  • 본 연구에서는 광섬유형(Fiber Optic Current Sensor) 광전류센서 구성 시 발생하는 선형복굴절(Linear Birefringence)의 보상에 용이한 수직원형틀(Orthogonal Loop Type) 센서헤드(Sensor Heads)를 개선하여 1 Cross 수직원형틀(l Cross Orthogonal Loop Type)을 제시하였다. 그리고 기존의 페루프형 원형틀 (Closed Loop Type), 수직원형틀 그리고 1 Cross 수직원형틀의 편광상태를 비교하였다. 그 결과 편광상태 측정 시 페루프 원형틀을 수직원형틀로 교체할 경우 15.3%, 1 Cross 수직원형틀로 교체할 경우 33.8%의 선형복굴절 감소 효과가 나타났다. 이에 1 Cross 수직원형틀을 광전류센서에 적용할 경우 안정된 편광특성으로 고신뢰성 광전류센서 개발 가능성을 높게 할 것이다.

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Equivalence Between Two Orthogonal Oriented Circular Loops and Planar Inveryed-F Antenna Array (직교형 원형 루프 안테나와 역 에프형 배열구조의 등가성 분석)

  • Kim, Jong-Sung;Park, Seung-Mo;Choi, Won-Kyu;Seong, Nak-Seon
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.289-292
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    • 2005
  • Two planar inverted-F antenna (PIFA) arrays are proposed as an alternative model to generate input and radiation characteristics of two orthogonal oriented circular loops, which has polarization diversity, but inherent mechanical instability of two orthogonal loops, in particular, in installation and operation conditions. Two $1\times2$ PIFA sub-arrays are orthogonally placed on a ground plane and two different feeding networks are applied to control horizontal and vertical radiation current flows for each sub-array, respectively. Equivalence of scattering parameters and radiation patterns between two antennas are validated by the available commercial simulator.

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