• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.5
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• pp.241-246
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• 2004

In this paper, we present a novel integrated cell processor to handle individual embryos. Its functions are composed of transporting, isolation, orientation, and immobilization of cells. These functions are essential for biomanipulation of single cells, and have been typically carried out by a proficient operator. The purpose of this study is the automation of these functions for safe and effective cell manipulation using a MEMS based cell processor. This device is realized with a relatively simple design and fabrication process. Experimental results indicate that it can act as an efficient substitute for essential but very tiresome and repetitive manual work while contributing significantly to the improvement of speed and success rate of operation by facilitating cell manipulation. The cell viability test for the device is studied through the distribution of mitochondria in mice embryos and cultivation of cells for 86h.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.913-921
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• 2007

Retargetable compiler which generates executable code for a target processor and performance profiler are required to design a processor optimized for a specific application. This paper presents an architecture exploration methodology based on ADL (Architecture Description Language). We synthesized instruction set and optimized processor structure using information extracted from application program. The information of operation sequences executed frequently and register usage are used for processor optimization. Architecture exploration has been performed for JPEG encoder to show the effectiveness of the system. The ASIP designed using the proposed method shows 1.97 times better performance.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.477-481
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• 2004

High Quality CD, OAT audio requires that large amount of data. Currently, multi channel preference has been rapidly propagated among latest users. The MPEG(Moving Picture Expert Group) is provides data compression technology of sound and image system. The MPEG standard provides multi channel and 5.1 sounds, using the same audio algorithm as MPEG-l. And MPEG-2 audio is forward and backward compatible. The MDCT (Modified Discrete Cosine Transform) is a linear orthogonal lapped transform based on the idea of TDAC(Time Domain Aliasing Cancellation). In this paper, we proposed the micro-program type vector processor architecture a benefit in MDCT/IMDCT of MPEG-II AAC. And it's reduced operating coefficient by overlapped area to bind. To compare original algorithm with optimized algorithm that cosine coefficient reduced $0.5\%$multiply operating $0.098\%$ and add operating 80.58\%$. Algorithm test is used C-language then we designed hardware architecture of micro-programmed method that applied to optimized algorithm. This processor is 20MHz operation 5V.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.5
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• pp.123-128
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• 2011

In this paper, we design the CA-CFAR processor using a root-square approximation approach and a fixed-point operation to improve hardware complexity and reduce computational effort. We also propose CA-CFAR processor with multi-window, which is capable of concurrent parallel processing. The proposed architecture is synthesized and implemented into the FPGA and the performance is compared with the conventional processor designed by root-square libarary licensed by FPGA corporation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3144-3153
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• 1996

ATM switching system is made up of transport network and control newrk according to its functions. The control device, basic part of control network must be developed before developing any other functions, and control device must be stable and need high reliability. Out distributed ATM switching system consists of several ALSs that provides variable local call services, and an ACS that interconnect among several ALSs. Eech ALS has CCCP that takes charage of call and connection control functions, and ACS has an OMP that takes charge of OA&M(Operation, Administration and Maintenance) functios. In this paper, we analyzed the performance evaluation of control device that manipulate subscriber's call based on ITU-T Q.2931 standard protocol messages and Interprocessor communication messages. As a result of simulation when the number of ALS is under 22, as the call arrival rate increase the processor utilization of CCCP increase rapidly than that of OMP. When the number of ALS is incremented to 22, the processor utilization of CCCP is balanced with the of OMP, and when the number of ALS exceeds 22, the processor utiliztion of OMP increase rapidly. Also if messary processing time of OMP is 1.35 times that of CCCP, processor utilizations of CCCP and OMP is equal.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.5B no.4
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• pp.350-357
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• 2005

This paper presents a mechanical sensorless vector-controlled system with parameter identification by the aid of image processor. Based on the flux observer and the model reference adaptive system method, the proposed sensorless system includes rotor speed estimation and stator resistance identification using flux errors. Since the mathematical model of this system is constructed in a synchronously rotating reference frame, a linear model is easily derived for analyzing the system stability, including motor operating state and parameter variations. Because it is difficult to identify rotor resistance simultaneously while estimating rotor speed, a low-accuracy image processor is used to measure the mechanical axis position for calculating the rotor speed at a steady-state operation. The rotor resistance is identified by the error between the estimated speed using the estimated flux and the calculated speed using the image processor. Finally, the validity of this proposed system has been proven through experimentation.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.3
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• pp.149-155
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• 2007

In this paper, we propose an real-time implementation of JPEG2000 codec on the ARM9 processor. The implemented codec is designed to separate control codes from data management codes in order to use effectively the system resources such as processor and memory. Especially, in embedded situations like cellular phones it is very important to provide good services using limited processor and internal memory. Since ARM9 series processors do not provide floating-point, large amount of computational time is required to perform the operation which needs highly repetitive floating-point computations like DWT(discrete wavelet transform). The proposed codec was programed using fixed-point to overcome this weakness. Also code optimization considering cache memory was applied to further improve the computational speed.

• The Journal of the Korea Contents Association
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• v.13 no.4
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• pp.44-52
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• 2013

The SIFT algorithm is being actively researched for various image processing applications including video surveillance and autonomous vehicle navigation. The computation of sin/cos function is the most cost part needed in whole computational complexity and time for SIFT descriptor. In this paper, we implement a hardware to sin/cos function of descriptor on sift feature detection algorithm. The proposed Sin/Cosine processor is coded in Verilog and synthesized and simulated using Xilinx ISE 9.2i. The processor is mapped onto the device Spartan 2E (XC2S200E-PQ208-6). It consumes 149 slices, 233 LUTs and attains a maximum operation frequency of 60.01 MHz. As compared with the software realization, our FPGA circuit can achieve the speed improvement by 40 times in average.

• The Journal of the Acoustical Society of Korea
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• v.16 no.2
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• pp.80-88
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• 1997

In this paper, the implementation of audio/data processor using ETRI DSP to support analog mode in digital/analog dual mode mobile phone is presented. Audio/data processor performs the wideband data processing, audio signal processing, demodulation function, and data rate conversion when it is operated in analog mode. These functions are programmed in assembly language, and then loaded to ETRI DSP together with vocoder program for the digital mode operation. This is a very efficient implementation of the dual mode cellular phone ASIC since the vocoder for the digital mode and audio/data processor for the analog mode are programmed together in the same hardware.

• Journal of Advanced Engineering and Technology
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• v.5 no.4
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• pp.349-353
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• 2012

Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.