• 제목/요약/키워드: Open voltage

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Operational Characteristics of a Superconducting Fault Current Limiter with an Open Core (개방철심형 고온초전도한류기의 동작 특성)

  • 이찬주;이승제;강형구;김태중;현옥배;고태국
    • Progress in Superconductivity and Cryogenics
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    • v.3 no.1
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    • pp.40-44
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    • 2001
  • Recently. the high-tc superconducting fault col-rent limiters (SFCL) are studied worldwide to be classified as a resistive type or an inductive type such as a magnetic shielding type and a inductive type. The high-tc SFCL wish an open core belongs to the magnetic shielding type SFCL. Unlike conventional magnetic shielding type SFCLS it uses the open core to reduce the mechanical vibrations and installation space, The high-tc SFCL with an open core was designed and manufactured by stacking three BSCCO 2212 tubes. It was tested in the maximum source voltage of 400 Vrms. The results such as the reduction of fault current and impedance of the SFCL are described in this paper. The results show that the fault current in the source voltage of 400 Vrms was reduced to be about 123 Apeak. about 3.9 times greater than the normal state current. Also, the impedance of the high-tc SFCL was about 9${\Omega}$ about 9 times greater than the normal state impedance. The impedance of the SFCL appears just after the fault, and its size is dependent on the source voltage. From the impedance, the inductance of the SFCL was calculated.

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A nuclear battery based on silicon p-i-n structures with electroplating 63Ni layer

  • Krasnov, Andrey;Legotin, Sergey;Kuzmina, Ksenia;Ershova, Nadezhda;Rogozev, Boris
    • Nuclear Engineering and Technology
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    • v.51 no.8
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    • pp.1978-1982
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    • 2019
  • The paper presents the electrical performance measurements of a prototype nuclear battery and two types of betavoltaic cells. The electrical performance was assessed by measuring current-voltage properties (I-V) and determining the short-circuit current and the open-circuit voltage. With 63Ni as an irradiation source, the open-circuit voltage and the short-circuit current were determined as 1 V and 64 nA, respectively. The prototype consisted of 10 betavoltaic cells that were prepared using radioactive 63Ni. Electroplating of the radioactive 63Ni on an ohmic contact (Ti-Ni) was carried out at a current density of 20 mA/㎠. Two types of betavoltaic cells were studied: with an external 63Ni source and a 63Ni-covered source. Under irradiation of the 63Ni source with an activity of 10 mCi, the open-circuit voltage Voc of the fabricated cells reached 151 mV and 109 mV; the short-circuit current density Jsc was measured to be 72.9 nA/cm2 and 64.6 nA/㎠, respectively. The betavoltaic cells had the fill factor of 55% and 50%, respectively.

Constrution of Vnic Circuit Based on Voltage control (전압제어에 의한 VNIC 회로의 구성에 관하여)

  • 김재창
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.2
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    • pp.33-39
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    • 1974
  • Networks showing often and short stable voltage inversion negative immittance converter(VNIC) characteristics are proposed by simplified equivalent model. Open stable VNIC characteristics can be obtained of controlling the base voltage of common base connection according to output voltage and short stable VNIC characteristics according to input dotage. An unbalanced circuit showing open and short stable characteristics is constructed and ana1ysis. The experimental results are coincident with the calculated within 10% error.

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Power Management of Open Winding PM Synchronous Generator for Unbalanced Voltage Conditions

  • EL-Bardawil, Ashraf;Moussa, Mona Fouad
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2192-2201
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    • 2016
  • Wind energy is currently the fastest-growing electricity source worldwide. The cost efficiency of wind generators must be high because these generators have to compete with other energy sources. In this paper, a system that utilizes an open-winding permanent-magnet synchronous generator is studied for wind-energy generation. The proposed system controls generated power through an auxiliary voltage source inverter. The VA rating of the auxiliary inverter is only a fraction of the system-rated power. An adjusted control system, which consists of two main parts, is implemented to control the generator power and the grid-side converter. This paper introduces a study on the effect of unbalanced voltages for the wind-generation system. The proposed system is designed and simulated using MATLAB/Simulink software. Theoretical and experimental results verify the validity of the proposed system to achieve the power management requirements for balanced and unbalanced voltage conditions of the grid.

Development, Implementation and Experimentation on a dSPACE DS1104 of a Direct Voltage Control Scheme

  • Hmidet, Ali;Dhifaoui, Rachid;Hasnaoui, Othman
    • Journal of Power Electronics
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    • v.10 no.5
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    • pp.468-476
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    • 2010
  • This paper proposes and develops a new direct voltage control (DVC) approach. This method is designed to be applied in various applications for AC drives fed with a three-phase voltage source inverter (VSI) working with a constant switching time interval as in the standard direct torque control (DTC) scheme. Based on a very strong min(max) criterion dedicated to selecting the inverter voltage vector, the developed DVC scheme allows the generation of accurate voltage forms of waves. The DVC algorithm is implemented on a dSPACE DS1104 controller board and then compared with the space vector pulse width modulation technique (SVPWM) in an open loop AC drive circuit. To demonstrate the efficiency of the developed algorithm in real time and in closed loop AC drive applications, a scalar control scheme for induction motors is successfully implemented and experimentally studied. Practical results prove the excellent performance of the proposed control approach.

A New Programming Method of Scaled SONOS Flash Memory Ensuring 1$\times$10$^{6}$ Program/Erase Cycles and Beyond (1x10$^{6}$ 회 이상의 프로그램/소거 반복을 보장하는 Scaled SONOS 플래시메모리의 새로운 프로그래밍 방법)

  • 김병철;안호명;이상배;한태현;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.54-57
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    • 2002
  • In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

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The Improved Electrical Endurance(Program/Erase Cycles) Characteristics of SONOS Nonvolatile Memory Device (SONOS 비휘발성 기억소자의 향상된 프로그램/소거 반복 특성)

  • 김병철;서광열
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.1
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    • pp.5-10
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    • 2003
  • In this study, a new programming method to minimize the generation of Si-SiO$_2$interface traps of SONOS nonvolatile memory device as a function of number of porgram/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate. forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and dram are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics or SONOS devices because electrical stress applied to the Si-SiO$_2$interface is reduced due to short program time.

A Temperature- and Supply-Insensitive 1Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs (High-Bandwidth DRAM용 온도 및 전원 전압에 둔감한 1Gb/s CMOS Open-Drain 출력 구동 회로)

  • Kim, Young-Hee;Sohn, Young-Soo;Park, Hong-Jung;Wee, Jae-Kyung;Choi, Jin-Hyeok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.8
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    • pp.54-61
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    • 2001
  • A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

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A Novel Fault Detection Method of Open-Fault in NPC Inverter System (NPC 인버터의 개방성 고장에 대한 새로운 고장 검출 방법)

  • Lee, Jae-Chul;Kim, Tae-Jin;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.2
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    • pp.115-122
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    • 2007
  • In this paper, a novel fault detection method for fault tolerant control is proposed when the NPC inverter has a open failure in the switching device. The open fault of switching device is detected by checking the variation of a leg-voltage in the neutral-point-clamped inverter and the two phases control method is used for continuously balance the three phases voltage to the load. It can be achieve the fault tolerant control for improving the reliability of the NPC inverter by the fault detection and reconfiguration. This method has fast detection ability and a simple realization for fault detection, compared with a conventional method. Also, this fast detection ability improved the harmful effects such as DC-link voltage unbalance and overstress to other switching devices from a delay of fault detection. The proposed method has been verified by simulation and experiment.

Development and Characteristics of Detector for Open of Current Transformer Secondary Terminal (변류기 2차측 개방 보호장치 개발 및 특성)

  • Choi, Sang-Won;Song, Ki-Chan
    • Journal of the Korean Society of Safety
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    • v.22 no.4
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    • pp.20-25
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    • 2007
  • Instrument transformers are a safe measurement device designed to measure high voltage and large current. A current transformer(CT) is a type of instrument transformer designed to provide a current in its secondary winding proportional to the current flowing in its primary. It is commonly used in metering and protective relaying in the electrical power industry where it facilitates the safe measurement of large current. But, care must be taken that the secondary of a current transformer is not disconnected from its load while current is flowing in the primary, as this will produce a dangerously high voltage across the open secondary, and may permanently affect the accuracy of the transformer. Especially, industrial disaster such as an electric shock and/or a burn accident occurs occasionally by disregard of warning or attention. In this paper, we developed the detector for open of current transformer secondary terminal, and which was tested by the Korea Electrotechnology Research Institute. Test results show that Current Transformer secondary Open Detector(CTOD) interrupted within one second electronically when the 2nd terminal of current transformer opened.