• Title/Summary/Keyword: Op-amp

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Measurement of wall charge characteristics for three-electrode AC PDP

  • Yoon, Sang-Jin;Yang, Hee-Chan;Kang, Seong-Ho;Ryu, Jae-Hwa;Kang, Bong-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.605-608
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    • 2002
  • This paper proposes a real-time wall charge measurement circuit for three-electrode AC PDP. It includes a charge-compensation network, current-integrating capacitors, initializing switches, and an op-amp. With this equipment, we measure the wall charge variations for the effects of sustain voltage, sustain pulse width, sustain frequency, and neighboring cells.

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Driving circuit of magnetoimpedance sensor using Instrumentation amplifier (계측증폭기를 이용한 자기임피던스센서의 구동회로)

  • Song, Jae-Yeon;Kim, Young-Hak;Shin, Kwang-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.581-584
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    • 2003
  • The phase differences and noise signals are in general serious on output of a instrumentation amplifier for signal conditioning of a sensor driven at high frequency due to a time-varying input signal. In this study, we get the better amplification and S/N ratio using the rectified signal for the input of instrumentation amplifier. This driving circuits were designed and constructed by OrCAD and laboratory PCB process. All of the elements used on the circuit including highly speedy OP-Amp. was SMD type and the MI sensor was fabricated by meander-patterned amorphous ribbon. The output sensitivity of this circuit was $105.3mV/V{\cdot}Oe$. That's why this driving circuit is good at detection of fine magnetic field.

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Electronic Circuit Analysis of the Lorentz Chaotic System for Engineering Applications (공학적 응용을 위한 로렌츠 카오스 시스템의 전자회로 해석)

  • Han, Sang-Baek;Jo, Mun-Kyu;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.1
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    • pp.311-316
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    • 2012
  • In this paper, chaotic circuit of the Lorentz system for engineering applications was implemented using resistor, multipliers, capacitors and operational amplifiers. The implemented Lorentz chaotic system was analysed by PSPICE program. PSPICE simulation results show many kind of chaotic phenomena such time waveforms and phase plots. Meanwhile, according to resistor's variation, we got that Lorentz system show equilibrium state, periodic state and chaotic state.

Effects of Fructus Piperis Longi Extracts on Glucose Uptake in Adipocyte (필발 추출물의 포도당 흡수능에 대한 효과)

  • Kim, Mi Seong;Kwon, Kang Beom;Song, Je Ho
    • Journal of Physiology & Pathology in Korean Medicine
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    • v.28 no.1
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    • pp.59-62
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    • 2014
  • Glucose uptake plays a pivotal role in maintaining whole body glucose homeostasis in adipocytes and skeletal muscles. In the present study we have shown that Fructus Piperis Longi Extracts (FPLE) can stimulate glucose uptake in OP9 adipocytes. The increasing effects of FPLE on glucose uptake were inhibited by compound C pretreatment, which means that the glucose uptake effects by FPLE were carried out by AMP-activated protein kinase (AMPK) activation. Further studies revealed that FPLE stimulated glucose transport occurs through a mechanism involving extracellular signal-regulated kinase (ERK1/2) activation.

TIG Welding Process Monitoring using Photo Diode (광소자를 이용한 TIG 용접 가공의 모니터링)

  • 장욱진;김재도
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1995.04b
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    • pp.383-388
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    • 1995
  • The ARC light has been measured using photo-detect system under different TIG welding condition. Light detect system consists of photo diode, ND Filter, OP Amp. A/D convertor and PC. The purpose of this experiment is to show the relationship between ARC light and process variables such as welding current, torch travel speed, etc. The results can be applied to estimate the condition of welding process and the quality of welding products. The signal of ARC light has periodic patterns in good TIG welding condition whereas in abnormal condition the signal has different pattern. Amount of Ar shielding gas and distance from electrode to specimen affect the signal pattern significantly.

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A design of high-linearity low-power contiunous-time filter for post-processing of .SIGMA..DELTA. converters ($\Delta$ 변환기 후단 처리용 고선형 저전력 연속시간 필터의 설계)

  • 홍국태;정현택;손한웅;염왕섭;정강민
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.7
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    • pp.1579-1589
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    • 1997
  • This paper introduces a monolithic chip 3.3V high-performance continuous-tune filter used in a CDP that can reconstruct the PDM or PWM signal output of a .SIGMA..DELTA. D/A converter. We also mentioned an active RC filter structure and filter order satisfying high-linearity and the design specification. In desigining the OP-AMP, using a structure that accepts some distortion we could reduce the chip area, and reducing the DC path using a new biascircuit gave us better power performance. The designed.SIGMA..DELTA. D/A converter post-processing filter does its smoothering operations and reconstructs the data without reducing the performance of the system.

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A study on the Filter design using OTA (OTA를 이용한 필터 설계에 대한 연구)

  • 이영훈
    • Journal of the Korea Society of Computer and Information
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    • v.7 no.2
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    • pp.68-72
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    • 2002
  • In this study, I studied on the principle of OTA and it's basic application. Here, I designed second order filter using OTA. This filter has three inputs and one output. If we use each one input among them, we can get a low pass, high pass and band pass output. In the result of the computer simulation. the linear characteristics was superior to the conventional Op-Amp filter. And this circuit is advantageous to making an IC. This will be used to the communication system which has the low distortion and high frequency circuit. This study will have to be continued to form a higher order filter using OTA.

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A Design of an Active Noise Controller in a Communication Headset (통신용 헤드셋을 위한 능동소음제어기의 설계)

  • Chung, Tae-Jin;Chung, Chan-Soo
    • Journal of Institute of Control, Robotics and Systems
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    • v.7 no.2
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    • pp.102-108
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    • 2001
  • In this paper, an active noise controller for a communication headset was designed. In a communication headset, there exist information signals such as voices from the end for the communication line as well as also, undesirable noises with are induced by external noise sources such as engine noises. Therefore, it is necessary to reduce the external noises for clear hearing of the communication signals. This problem was solved by robust H(sub)$\infty$ controller to reduce noise and a compensator for information signals The designed controller was implemented using TMS320C31 DSP Op-amp, and several experiments were performed to verify its performance. The results showed that the controller reduces the undesirable noises sufficiently, while communication signals are not reduced.

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A 1.2-V 0.18-${\mu}m$ Sigma-Delta A/D Converter for 3G wireless Applications

  • Kim, Hyun-Joong;Jung, Tae-Sung;Yoo, Chang-sik
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.627-628
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    • 2006
  • A low-voltage switched-capacitor $2^{nd}$-order $\Sigma\Delta$ modulator using full feed-forward is introduced. It has two advantages: the unity signal transfer function and reduced signal swings inside the $\Sigma\Delta$ loop. These features greatly relax the DC gain and output swing requirements for Op-Amp in the low-voltage $\Sigma\Delta$ modulator. Implemented by a 0.18-${\mu}m$ CMOS technology, the $\Sigma\Delta$ modulator satisfies performance requirements for WCDMA and CDMA2000 standards.

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Estimating Non-Ideal Effects within a Top-Down Methodology for the Design of Continuous-Time Delta-Sigma Modulators

  • Na, Seung-in;Kim, Susie;Yang, Youngtae;Kim, Suhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.3
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    • pp.319-329
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    • 2016
  • High-level design aids are mandatory for design of a continuous-time delta-sigma modulator (CTDSM). This paper proposes a top-down methodology design to generate a noise transfer function (NTF) which is compensated for excess loop delay (ELD). This method is applicable to low pass loop-filter topologies. Non-ideal effects including ELD, integrator scaling issue, finite op-amp performance, clock jitter and DAC inaccuracies are explicitly represented in a behavioral simulation of a CTDSM. Mathematical modeling using MATLAB is supplemented with circuit-level simulation using Verilog-A blocks. Behavioral simulation and circuit-level simulation using Verilog-A blocks are used to validate our approach.