• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.993-997
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• 2004

A data error inspection algorithm for wireless digital data communication was developed. Original data converted By wireless digital data error inspection algorithm. Wireless digital data is high possibility to get distortion and lose by noise and barrier on wireless. If the data check damaged and lost at receiver, can't make it clear and can't judge whether this data is right or not. Therefore, by wireless transmission data need the data error inspection algorithm in order to decrease the data distortion and lose and to monitoring the transmission data as real time. This study consists of RF station for wireless transmission, Water Level Meter station for water level measurement and Error inspection algorithm for error check of transmission data. This study is also that investigation and search for error inspection algorithm in order to wireless digital data transmission in condition of the least data's damage and lose. Designed transmitter and receiver with one - chip micro process to protect to swell the volume of circuit. Had designed RF transmitter - receiver station simply by means of ATMEL one - chip micro processing the systems. Used 10mW of the best RF power and 448MHz-449MHz on frequency band which is open to public touse free within the limited power.

• 한국산학기술학회논문지
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• 제16권1호
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• pp.683-690
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• 2015

FFT(Fast Fourier Transform) 알고리즘에는 DIT(Decimation-In-Time)와 DIF(Decimation-In-Frequency)가 있다. DIF 알고리즘은 Radix-2/4/8 등의 다양한 종류와 그 구현 방법이 개발되어 사용되고 잇으나, DIT 알고리즘은 순차적인 출력을 낼 수 있는 장점이 있음에도 불구하고 다양한 알고리즘이 연구되지 못하였다. 이 논문에서는 새로운 DIT Radix-4 FFT의 나비연산기(butterfly) 구조를 제안하고 검증하였다. 제안 구조를 사용하여 64-point FFT 구조를 설계하고 Verilog로 코딩하여 구현함으로써 제안 구조의 효용성을 입증하였다. 48개의 곱셈기를 사용하여 합성하였으며 678만 게이트 수를 나타내었다. 따라서 제안된 DIT Radix-4 FFT 구조는 순차적인 FFT 출력을 필요로 하는 OFDM 통신용 SoC(System on a Chip)에 사용될 수 있을 것이다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권3호
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• pp.198-206
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• 2013

This paper presents a wide band, fine-resolution digitally controlled oscillator (DCO) with an on-chip 3-D solenoid inductor using the 0.13 ${\mu}m$ digital CMOS process. The on-chip solenoid inductor is vertically constructed by using Metal and Via layers with a horizontal scalability. Compared to a spiral inductor, it has the advantage of occupying a small area and this is due to its 3-D structure. To control the frequency of the DCO, active capacitor and active inductor are tuned digitally. To cover the wide tuning range, a three-step coarse tuning scheme is used. In addition, the DCO gain needs to be calibrated digitally to compensate for gain variations. The DCO with solenoid inductor is fabricated in 0.13 ${\mu}m$ process and the die area of the solenoid inductor is 0.013 $mm^2$. The DCO tuning range is about 54 % at 4.1 GHz, and the power consumption is 6.6 mW from a 1.2 V supply voltage. An effective frequency resolution is 0.14 kHz. The measured phase noise of the DCO output at 5.195 GHz is -110.61 dBc/Hz at 1 MHz offset.

• ETRI Journal
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• 제46권3호
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• pp.550-563
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• 2024

A novel inductance simulation circuit employing only two dual-output voltage-differencing buffered amplifiers (DO-VDBAs) and a single capacitance (grounded) is proposed in this paper. The reported configuration is a purely resistor-less realization that provides electronically controllable realized inductance through biasing quantities of DO-VDBAs and does not rely on any constraints related to matched values of parameters. This structure exhibits excellent behavior under the influence of tracking errors in DO-VDBAs and does not exhibit instability at high frequencies. The simple and compact metal-oxide semiconductor (MOS) implementation of the DO-VDBAs (eight MOS per DO-VDBA) and adoption of grounded capacitance make the proposed circuit suitable for on-chip realization from the perspective of chip area consumption. The function of the pure grounded inductance is validated through high pass/bandpass filtering applications. To test the proposed design, simulations were performed in the PSPICE environment. Experimental validation was also conducted using the integrated circuit CA3080 and operational amplifier LF-356.

• 한국정보통신학회논문지
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• 제19권5호
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• pp.1157-1162
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• 2015

본 논문에서는 OFDM 기반의 4x4 MIMO 알고리즘을 설계 및 구현을 하였으며, 구현된 결과를 검증하기 위한 방법을 제시한다. 알고리즘은 MRVD와 QRM-MLD을 적용했다. Matlab과 Simulink를 이용하여 채널 추정 및 MIMO 알고리즘을 Floating-point와 Fixed-point 모델로 설계하였다. 그 다음 Modelsim을 이용하여 VHDL로 구현한다. 구현된 알고리즘의 성능 검증을 위해 설계한 Simulink 모델과 Modelsim 시뮬레이션, ISE ChipScope, 그리고 오실로스 코프로 측정한 결과를 비교하는 방법을 사용하였다. 이 방법은 시스템이 완성되지 않은 상태에서 구현된 알고리즘을 검증하는 방법이다. 검증 결과 ChipScope의 결과와 오실로스코프의 결과가 동일함을 확인하였고, 백홀 시스템에 적용이 가능함을 확인하였다.

• Journal of Advanced Marine Engineering and Technology
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• 제31권6호
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• pp.777-783
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• 2007

In this work, a highly integrated downconverter MMIC employing HBT(heterojunction bipolar transistor) was developed for application to one chip tranceiver solution of Ku-band commercial wireless communication system. The downconverter MMIC (monolithic microwave integrated circuit) includes mixer filter. amplifier and input/output matching circuit. Especially, spiral inductor structures employing SiN film were used for a suppression of LO and its second harmonic leakage signals. Concretely, they were properly designed so that the self-resonance frequency was accurately tuned to LO and its second harmonic frequency, and they were integrated on the downconverter MMIC.

• 한국정보통신학회논문지
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• 제3권3호
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• pp.687-694
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• 1999

본 논문에서는 ADSL용 칩 설계를 위한 동기화 파라미터 값을 도출하기 위하여 컴퓨터 모의수행으로 STR과 프레임동기의 성능을 분석한다. ADSL에 적합한 PLL루프를 분석하고 설계를 하며, 이러한 결과를 통하여 ADSL칩 설계를 위한 STR의 최적 파라미터 값을 얻는다. 또한 여러 가지 알고리즘으로 프레임동기를 수행할 때, 컴퓨터 모의수행으로 FER(Frame Error Rate)의 성능을 분석했고, 프레임 offset의 효과를 분석했다.

• International journal of advanced smart convergence
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• 제11권2호
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• pp.53-58
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• 2022

In this paper, w-band frequency synthesizer was developed for frequency-modulated continuous wave (FMCW) radar sensors. To achieve a small size and high performance, We designed and manufactured w-band MMIC chips such as up-converter one-chip, multiplier, DA (Drive Amplifier) MMIC(Monolithic Microwave Integrated Circuit), etc. And interposer technology was applied between the W-band multiplier and the DA MMIC chip. As a result, the measured phase noise was -106.10 dBc@1MHz offset, and the frequency switching time of the frequency synthesizer was less than 0.1 usec. Compared with the w-band frequency synthesizer using purchased chips, the developed frequency synthesizer showed better performance.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2007년도 춘계학술대회A
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• pp.1526-1531
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• 2007

Data transmission capacity that is required in 2010 is forecasted that increase by optical communication capacity more than present centuple, and is doing increased demand of optical communication related industry product present. Specially, Lid glass' application that is one of optical communication parts is used in optical communication parts manufacture of Fiber array, Ferrule array, Fanout Black, Silica optical waveguide chip and splitter etc. Also, it is used widely for communication network system, CATV, ATM-PON, FTTH and system. But, Lid glass need much processing times and becomes cause in rising prices of optical communication parts because production cost is expensive. The objectives, of this work is to suggest the micro concave and convex pattern manufacturing technology on borosilicate plate using high temperature and compression molding method. As a result, could developed micro pattern Mold more than 5 pattern, and reduce Lid Glass manufacture cycle time.

• 대한전자공학회논문지TC
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• 제43권11호
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• pp.185-191
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• 2006

DSRC(Dedicated Short Range Communication)은 도로변의 RSE(Road Side Equipment)와 고속으로 이동하는 차량의 단말인 OBE(On-Board Equipment)간의 통신을 위한 단거리 전용 무선 통신 표준이다. 본 논문에서는 국내의 TTA(Telecommunication Technology Association) 표준에 호환되는 DSRC 규격에 따라 5.8GHz DSRC 모뎀을 구현하고, 이를 제어하고 연산처리를 수행할 수 있도록 ARM9 CPU를 임베딩 시킨 SoC(System on a Chip)에 대한 구현과정 및 제작한 SoC를 장착시킨 OBE 단말의 테스트결과에 대해 제시하였다. 본 논문에서 구현한 SoC는 0.11 um 공정을 적용하였으며 480 핀 EPBGA 패키지로 설계되었다. 제작 SoC ($Jaguar^{TM}$)에는 5.8GHz용 DSRC PHY(Physical Layer) 모뎀과 MAC 블록을 설계하여 장착하였으며, ARM926EJ-S 코어를 CPU로 사용하였고, LCD 콘트롤러, 스마트카드 콘트롤러, 이더넷 MAC 코어, 메모리 콘트롤러 등을 주요 기능으로 포함시켰다.