• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.6
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• pp.129-135
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• 2020

This study relates to a characteristic change and frequency correction method according to the temperature sensor position of an oven-controlled crystal oscillator (OCXO) using a 10 MHz SC-CUT crystal. Although there are several methods of manufacturing the previous high-precision 10MHz OCXO, the present study shows that the frequency stability characteristics against external temperature changes can be improved simply by adjusting the position of the temperature sensor. Factors that affect the frequency characteristics of the OCXO include the temperature transmitted to the crystal, the voltage applied to the crystal, and the capacitance constituting the oscillation circuit. The amount of change in frequency due to these factors was measured, and the change in the correction value of the OCXO output frequency was investigated by measuring the temperature inflection point and changing the capacitor value.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.93-97
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• 2007

In this paper a new clock generation scheme for TDM-CDM converter in the Gap Filler for satellite DMB systems has been proposed. The scheme uses the frame sync signal from the Ku band TDM receiver to lock the VCXO which provides the system clock for the TDM-CDM converter. The locking algorithm can be easily implemented in the FPGA, so that no separate circuitry is needed as in conventional PLL. With a stable OCXO, The scheme can be used to generate the reference clock to the local oscillator for RF parts.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.552-559
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• 2002

The EM(Engineering Model) LO(Local Oscillator) is designed for Ka-band satellite transponder. The VCO(Voltage Controlled Oscillator) is implemented using a high impedance inverter coupled with dielectric resonator to improve the phase noise performance out of the loop bandwidth. The phase of VCO is locked to that of a stable OCXO(Oven Controlled Crystal Oscillator) by using a SPD(Sampling Phase detector) to improve phase noise performance in the loop bandwidth. This LO exhibits the harmonic rejection characteristics above 43.83 dBc and requires 15 V and 160 mA. The phase noise characteristics are performed as -102.5 dBc/Hz at 10 KHz offset frequency and -104.0 dBc/Hz at 100 KHz offset frequency, respectively, with the output power of 13.50 dBm$\pm$0.33 dB over the temperature range of -20~+7$0^{\circ}C$.

• Journal of Positioning, Navigation, and Timing
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• v.2 no.1
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• pp.75-80
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• 2013

This article presents the design of long range navigation (LORAN)-disciplined oscillator (LDO), employing the timing information of the LORAN system, which was developed as a backup system that corrects the vulnerability of the global positioning system (GPS)-based timing information utilization. The LDO designed on the basis of hardware generates a timing source synchronized with reference to the timing information of the LORAN-C receiver. As for the LDO-based timing information measurement, the Kalman filter was applied to estimate the measurement of which variance was minimized so that the stability performance could be improved. The oven-controlled crystal oscillator (OCXO) was employed as the local oscillator of the LDO. The controller was operated by digital proportional-integral-derivative (PID) controlling method. The LDO performance evaluation environment that takes into account the additional secondary factor (ASF) of the LORAN signals allows for the relative ASF observation and data collection using the coordinated universal time (UTC). The collected observation data are used to analyze the effect of ASF on propagation delay. The LDO stability performance was presented by the results of the LDO frequency measurements from which the ASF was excluded.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.7
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• pp.669-676
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• 2015

In this paper, we described the simulation results of the phase offset performance of a clock in holdover mode which was normally operated in GPS Disciplined Oscillator (GPSDO). In the TIE model, we included the time error term caused by environmental temperature variation because one of the most important parameters of clock phase error is the frequency offset and drift caused by the variation of temperature. For the simulation, we employed Maximum Time Interval Error (MTIE) for the performance evaluation when the frequency offset and drift are estimated by using an Unbiased Finite Impulse Response (UFIR) filter with ladder algorithm. We assumed that the noise in the GPS measurement is white Gaussian with zero mean and 1 ns standard deviation, and temperature linearly varies with a slope of $1{^{\circ}C}$ per hour. From the simulation results, the followings were observed. First, with the estimation error of temperature of less than 3 % and the temperature compensation period of less than 900 seconds, the requirement of CDMA2000 phase synchronization under 10 us could be achieved for more than 40,000 seconds holdover time if we employ an OCXO (Oven Controlled Crystal Oscillator) clock. Second, in order to achieve the requirement of LTE-TDD under 1.5 us for more than 10,000 seconds holdover time, below 3 % estimation error and 500 seconds should be retained if a Rubidium clock is adopted.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.6
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• pp.669-675
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• 2014

In this paper, we described the investigated theoretical time synchronization performances and experiment results obtained by commercially provided PTP (Precise Time Protocol) modules when the time of a slave clock is synchronized to the master clock. In the case of the theoretical performance analysis, we investigated 3 types of clock levels such as Crystal Oscillator (XO), TCXO (Temperature Compensated XO) and OCXO (Oven Controlled XO). From the analysis, it was observed that the synchronization performance is greatly influenced by the synchronization period and the required performance under 1 us can be achieved by using XO level clocks when the synchronization period is less than 2 seconds and the uncertainty of the propagation delay is under 100 ns. For the experiments using commercial PTP modules, the synchronization performance was investigated for direct, through 1 hub and through 2 hubs connections between the master clock and the slave clock. From the experiment results, we observed that time synchronization under 90 ns with 1,000 seconds observation interval can be achieved in the case of direct connection.