• Title/Summary/Keyword: Novel structure

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A study on Improvement of sub 0.1$\mu\textrm{m}$VLSI CMOS device Ultra Thin Gate Oxide Quality Using Novel STI Structure (STI를 이용한 서브 0.1$\mu\textrm{m}$VLSI CMOS 소자에서의 초박막게이트산화막의 박막개선에 관한 연구)

  • 엄금용;오환술
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.9
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    • pp.729-734
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    • 2000
  • Recently, Very Large Scale Integrated (VLSI) circuit & deep-submicron bulk Complementary Metal Oxide Semiconductor(CMOS) devices require gate electrode materials such as metal-silicide, Titanium-silicide for gate oxides. Many previous authors have researched the improvement sub-micron gate oxide quality. However, few have reported on the electrical quality and reliability on the ultra thin gate oxide. In this paper, at first, I recommand a novel shallow trench isolation structure to suppress the corner metal-oxide semiconductor field-effect transistor(MOSFET) inherent to shallow trench isolation for sub 0.1${\mu}{\textrm}{m}$ gate oxide. Different from using normal LOCOS technology deep-submicron CMOS devices using novel Shallow Trench Isolation(STI) technology have a unique"inverse narrow-channel effects"-when the channel width of the devices is scaled down, their threshold voltage is shrunk instead of increased as for the contribution of the channel edge current to the total channel current as the channel width is reduced. Secondly, Titanium silicide process clarified that fluorine contamination caused by the gate sidewall etching inhibits the silicidation reaction and accelerates agglomeration. To overcome these problems, a novel Two-step Deposited silicide(TDS) process has been developed. The key point of this process is the deposition and subsequent removal of titanium before silicidation. Based on the research, It is found that novel STI structure by the SEM, in addition to thermally stable silicide process was achieved. We also obtained the decrease threshold voltage value of the channel edge. resulting in the better improvement of the narrow channel effect. low sheet resistance and stress, and high threshold voltage. Besides, sheet resistance and stress value, rms(root mean square) by AFM were observed. On the electrical characteristics, low leakage current and trap density at the Si/SiO$_2$were confirmed by the high threshold voltage sub 0.1${\mu}{\textrm}{m}$ gate oxide.

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A Novel ECB cell using bend structure for Nematic Liquid Crystal on Rubbed Polyimide Surface

  • Hwang, J.Y.;Kim, K.W.;Seo, D.S.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1137-1141
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    • 2004
  • In this paper, we have improved a novel ECB mode using bend structure with high tilt angle in the unique condition by Hot plate equipment. The new control of tilt angle for nematic liquid crystal (NLC) with negative and positive dielectric anisotropy on the rubbed homeotropic polyimide (PI) using baking method by Hot plate equipment was investigated. LC tilt angle decreased with increasing baking temperature and time. We suggest that the development of the novel ECB cell using control of tilt angle on the homeotropic surface is a promising technique for the achievement of fast response time and high contrast ratio.

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Characteristic Analysis of A Novel Two-Phase Permanent Magnet Synchronous Motor with Asymmetric U-core Stator Structure (비대칭 U - 코어 고정자 구조를 가진 새로운 2상 영구자석 동기전동기의 특성해석)

  • Zhao, Fei;Lipo, Thomas Anthony;Kwon, Byung-Il
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1089-1090
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    • 2011
  • This paper presents a novel two-phase two-pole permanent magnet synchronous motor (PMSM) with asymmetric U-core stator structure. The construction and parameters of the novel two-phase U-core PMSM are compared with a conventional U-core single-phase PMSM (SPMSM). Then transient characteristics such as torque, back-emf, and power loss of the both PMSMs are analyzed by using 3-D Finite Element Method (FEM). Under the same condition of rated input current, synchronous speed, similar dimensions and volume, FE results show that the two-phase PMSM with U-core stator has significantly less torque ripple than single-phase U-core PMSM, with similar power loss and efficiency.

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High Power Factor Low Torque Ripple Drive Scheme of Single-Phase SRM based on Mathematical Model (수학적 모델을 기반으로 한 단상 SRM의 고역률 저토크리플 구동방식)

  • Liang, Jianing;Kim, Tae-Hyoung;Lee, Dong-Hee;Ahn, Jin-Woo
    • Proceedings of the KIEE Conference
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    • 2007.04c
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    • pp.103-106
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    • 2007
  • This paper presents single-phase SRM drive system with single-stage high power factor and low torque ripple. Single-phase SRM has simple mechanical and electrical structure, robust and high speed operation characteristic. But conventional SRM drive with diode bridge rectifier and filter capacitor has a low power factor because of short charge time of capacitor. Therefore, this paper presents a novel single-phase SRM drive with single-stage structure circuit, which can improve the power factor and reduce peak torque ripple. A novel switching topology is presented base on mathematical analysis. The novel drive method is verified by simulations and experiments.

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Highly Miniaturized and Low impedance Wilkinson Power Divider on RFIC/MMIC for application to IT components of Ocean Engineering (해양 IT 소자에의 응용을 위한 RFIC/MMIC용 초소형 저임피던스 윌킨슨 전력분배기 설계)

  • Kim, Choong-Ryul;Yun, Young
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2005.06a
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    • pp.412-416
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    • 2005
  • In this paper we propose low-impedance and miniaturized a wilkinson power divider on MMIC passive component which was fabricated by a novel microstrip line structure employing periodically perforated ground metal (PPGM). The novel microstrip line structure showed much lower impedance and shorter guided-wavelength than conventional one. Using the novel microstrip line with periodically perforated ground metal, a miniaturized 17 ${\Omega}$ power divider was fabricated. The line width of the power divider was 20 ${\mu}m$, and the size of it was 0.110 $mm^2$, which is 21 % of conventional one. The power divider exhibited good RF performances from 10 to 20 GHz.

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Characteristic Analysis of Two-Phase 4/5-Pole Switched Reluctance Motor

  • Ahn, Jin-Woo
    • Journal of international Conference on Electrical Machines and Systems
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    • v.1 no.3
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    • pp.347-353
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    • 2012
  • Design and analysis of a novel 2-phase 4/5 Switched Reluctance Motor(SRM) is presented. The proposed motor employs a novel stator pole configuration. A novel SRM employs four-rotor and five-stator poles. The motor has no dead-zone and can be operate at any rotor position. The structure and operating principle are also described. The comparison between the proposed motor and a conventional two-phase 4/2 SRM is undertaken in this analysis. Furthermore, the Finite Element Analysis(FEA) and matlab-simulink are used to predict and simulate the performance of a proposed motor. The results of investigation indicate that the proposed structure offers a better performance in term of torque production.

Genome-Wide Identification and Classification of MicroRNAs Derived from Repetitive Elements

  • Gim, Jeong-An;Ha, Hong-Seok;Ahn, Kung;Kim, Dae-Soo;Kim, Heui-Soo
    • Genomics & Informatics
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    • v.12 no.4
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    • pp.261-267
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    • 2014
  • MicroRNAs (miRNAs) are known for their role in mRNA silencing via interference pathways. Repetitive elements (REs) share several characteristics with endogenous precursor miRNAs. In this study, 406 previously identified and 1,494 novel RE-derived miRNAs were sorted from the GENCODE v.19 database using the RepeatMasker program. They were divided into six major types, based on their genomic structure. More novel RE-derived miRNAs were confirmed than identified as RE-derived miRNAs. In conclusion, many miRNAs have not yet been identified, most of which are derived from REs.

Novel Devices for Sub-100 nm CMOS Technology

  • Lee, Jong-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.180-183
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    • 2000
  • Beginning with a brief introduction on near 100 nm or below CMOS devices, this paper addresses novel devices for future sub-100 nm CMOS. First, key issues such as gate materials, gate dielectric, source/drain, and channel in Si bulk CMOS devices are considered. CMOS devices with different channel doping and structure are introduced by explaining a figure of merit. Finally, novel device structures such as SOI, SiGe, and double-gate devices will be discussed for possible candidates for sub-100 nm CMOS.

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