• Journal of Power Electronics
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• 제17권3호
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• 전력전자학회논문지
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• 제14권4호
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• pp.333-342
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• 2009

중성점 클램핑 방식(Neutral Point Clamped) 인버터로 알려져 있는 3레벨 NPC 인버터는 그 구조적 특성상 직류-링크(DC-link) 중성점(Neutral Point)에서 전압이 변동한다. 지금까지 많은 논문에서 이 문제에 대한 연구가 진행되었고 다양한 형태의 해결책들이 제시되었다. 그러나 인버터 내부에서 고장이 발생하여 그에 따른 고장허용제어가 NPC 인버터 시스템에 적용되었을 경우 중성점 전압변동은 정상 운전 시 나타나는 전압변동과 다르게 나타나기 때문에 고장허용 제어에 따른 중성점 전압변동에 대한 분석이 필요하다. 본 논문에서는 삼각파 비교 변조방법을 시스템에 적용하였을 경우 정상운전과 고장 발생 과 고장허용 제어 적용 시 직류-링크 중성점 전압 변동이 어떤 양상으로 나타나는지 분석하고 고장허용 제어에 의한 NPC 인버터의 고장검출 시간과 커패시터의 용량 사이의 관계를 고찰하였다. 시뮬레이션과 실험 결과를 이용하여 이론적 분석의 타당성을 검증하였다.

• Journal of Power Electronics
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• 제18권3호
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• pp.702-713
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• 2018

Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.

• 대한수학회보
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• 제44권2호
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• pp.315-330
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• 2007

In this paper, some hybrid fixed point theorems are proved which are further applied to first and second order neutral functional differential equations for proving the existence results for the extremal solutions under the mixed Lipschitz, compactness and monotonic conditions.

• 대한수학회보
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• 제48권4호
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• pp.705-712
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• 2011

In this paper, we investigate the boundary control of semilinear neutral evolution systems with a nonlocal condition by using the Banach fixed point theorem.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제8권1호
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• pp.41-54
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• 2004

Sufficient conditions for the controllability of neutral functional integrodifferential systems with infinite delay in Banach space are established by means of the Schaefer fixed point theorem.

• Journal of Electrical Engineering and Technology
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• 제12권2호
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• pp.738-750
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• 2017

In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

• Journal of Electrical Engineering and Technology
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• 제12권6호
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• pp.2227-2236
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• 2017

In order to solve the neutral-point voltage fluctuation problem of three-phase three-level T-type inverters (TPTLTIs), the unbalance characteristics of capacitor voltages under different switching states and the mechanism of neutral-point voltage fluctuation are revealed. Based on the mathematical model of a TPTLTI, a feed-forward voltage balancing control strategy of DC-link capacitor voltages error is proposed. The strategy generates a DC bias voltage using a capacitor voltage loop with a proportional integral (PI) controller. The proposed strategy can suppress the neutral-point voltage fluctuation effectively and improve the quality of output currents. The correctness of the theoretical analysis is verified through simulations. An experimental prototype of a TPTLTI based on Digital Signal Processor (DSP) is built. The feasibility and effectiveness of the proposed strategy is verified through experiment. The results from simulations and experiment match very well.

• Journal of Power Electronics
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• 제14권2호
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• pp.315-323
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• 2014

An optimized space vector pulse width modulation (SVPWM) method with common mode voltage elimination and neutral point potential balancing is proposed for an open-end winding induction motor. The motor is fed from both of the ends with two neutral point clamped (NPC) three-level inverters. In order to eliminate the common mode voltage of the motor ends and balance the neutral point potential of the DC link, only zero common mode voltage vectors are used and a balancing control factor is gained from calculation in the strategy. In order to improve the harmonic characteristics of the output voltages and currents, the balancing control factor is regulated properly and the theoretical analysis is provided. Simulation and experimental results show that by adopting the proposed method, the common mode voltage can be completely eliminated, the neutral point potential can be accurately balanced and the harmonic performance for the output voltages and currents can be effectively improved.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.560-564
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• 2003

This paper proposes a simple control strategy based on the discontinuous PWM(DPWM) to balance the DC-link voltage of three-level Neutral-Point-Clamped(WPC) inverters at low modulation index. New DPWM methods in multi-level inverter are also introduced. The proposed DPWM method changes the path and duration to flow the neutral point current out of or into neutral point of the DC-link and it makes the overall fluctuation of the DC-link voltage zero during a sampling time of reference voltage vector. Therefore, the voltage of the DC-link can be balanced fairly well and also the voltage ripple of the DC-link is reduced significantly. Moreover, comparing with conventional methods, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by experiment