• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.473-473
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• 2013

전자종이, 입을 수 있는 디스플레이, 플렉서블 터치 스크린, 투과성 면 등과 같은 차세대 플렉서블 투명 전자소자는 기계적으로 유연하고 광학적으로 투명하며 무게가 가벼운 특성을 지녀야 할 것으로 예상된다. 현재까지는Indium tin oxide (ITO), zinc tin oxide (ZTO), carbon nano tube (CNT)와 polyimide 계열의 물질들이flexible, wearable, and transparent electronics (FWTEs) 소자의 electrode, active channel, dielectric layers로 제안되어 활발히 연구되었다. 최근에는 높은 이동도(~200,000 cm2/Vs) 및 유연성(fracture strain of 30%), 투명도 (97.5% for monolayer)와 같은 특성을 갖는 그래핀에 대한 연구가 활발히 진행되고 있다. 그러나 그래핀을 차세대 플렉서블 투명 전자소자 구현에 적용하기 위해서는 플렉서블하고 투명한 절연체의 확보 및 그래핀의 진성(intrinsic) 특성 유지 등과 같은 문제점들을 해결해야 한다. 따라서, 본 연구팀에서는 그래핀 기반 플렉서블 투명 전자소자의 게이트 절연층으로 적합한 poly-4-vinylphenol/poly (melamineco-formaldehyde) (PVP/PMF) 물질을 제시하고 이에 대한 전기적 재료적 분석을 수행하였다. 특히 다양한 PVP와 PMF의 비율 및 가열(annealing 혹은 curing) 온도에서 형성된 PVP/PMF 층의 화학 및 전기적 특성을 FT-IR, I-V, 그리고 C-V 측정을 통해 확인하였다. PVP/PMF는 유기절연 물질의 하나로서 높은 유연성과 투명도를 갖고 있을 뿐만 아니라 그래핀에 적용 시 그래핀의 진성 특성을 확보할 수 있다. 이는 PVP/PMF에 존재하는 hydroxyl (-OH) 그룹과 그래핀 상에서 정공(hole)을 공급하는 것으로 알려져 있는 -OH 그룹들간의 cross-linking 메커니즘에 의한 것으로 예상된다. 마지막으로 최적화된 PVP/PMF (낮은 hysteresis 전압)를 게이트 절연층에 적용하여 polyethylene terephthalate (PET) 기판 및 연구원의 손가락 위에 95.8%의 투명도 및 0에 가까운 Dirac point를 갖는 그래핀 기반 플렉서블 투명 전자소자를 성공적으로 집적하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.4
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• pp.285-296
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• 2005

Reduced pressure chemical vapor deposition technology has been used to study SiGe heterostructure epitaxy and device issues, including SiGe relaxed buffers, proper control of Ge component and crystalline defects, two dimensional delta doping, and their influence on electrical properties of devices. From experiments, 2D profiles of B and P presented FWHM of 5 nm and 20 nm, respectively, and doses in 5×10/sup 11/ ∼ 3×10/sup 14/ ㎝/sup -2/ range. The results could be employed to fabricate SiGe/Si heterostructure field effect transistors with both Schottky contact and MOS structure for gate electrodes. I-V characteristics of 2D P-doped HFETs revealed normal behavior except the detrimental effect of crystalline defects created at SiGe/Si interfaces due to stress relaxation. On the contrary, sharp B-doping technology resulted in significant improvement in DC performance by 20-30 ％ in transconductance and short channel effect of SiGe HMOS. High peak concentration and mobility in 2D-doped SiGe heterostructures accompanied by remarkable improvements of electrical property illustrate feasible use for nano-sale FETs and integrated circuits for radio frequency wireless communication in particular.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.157-157
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• 2008

As the minimum feature size of semiconductor devices scales down to nano-scale regime, ultra shallow junction is highly necessary to suppress short channel effect. At the same time, Ni-silicide has attracted a lot of attention because silicide can improve device performance by reducing the parasitic resistance of source/drain region. Recently, further improvement of device performance by reducing silicide to source/drain region or tuning the work function of silicide closer to the band edge has been studied extensively. Rare earth elements, such as Er and Yb, and Pd or Pt elements are interesting for n-type and p-type devices, respectively, because work function of those materials is closer to the conduction and valance band, respectively. In this paper, we increased the work function between Ni-silicide and source/drain by using Pd stacked structure (Pd/Ni/TiN) for high performance PMOSFET. We demonstrated that it is possible to control the barrier height of Ni-silicide by adjusting the thickness of Pd layer. Therefore, the Ni-silicide using the Pd stacked structure could be applied for high performance PMOSFET.

• Asian Pacific Journal of Cancer Prevention
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• v.17 no.3
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• pp.879-894
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• 2016

In micro-fluid systems, fluids are injected into extremely narrow polymer channels in small amounts such as micro-, nano-, or pico-liter scales. These channels themselves are embedded on tiny chips. Various specialized structures in the chips including pumps, valves, and channels allow the chips to accept different types of fluids to be entered the channel and along with flowing through the channels, exert their effects in the framework of different reactions. The chips are generally crystal, silicon, or elastomer in texture. These highly organized structures are equipped with discharging channels through which products as well as wastes of the reactions are secreted out. A particular advantage regarding the use of fluids in micro-scales over macro-scales lies in the fact that these fluids are much better processed in the chips when they applied as micro-scales. When the laboratory is miniaturized as a microchip and solutions are injected on a micro-scale, this combination makes a specialized construction referred to as "lab-on-chip". Taken together, micro-fluids are among the novel technologies which further than declining the costs; enhancing the test repeatability, sensitivity, accuracy, and speed; are emerged as widespread technology in laboratory diagnosis. They can be utilized for monitoring a wide spectrum of biological disorders including different types of cancers. When these microchips are used for cancer monitoring, circulatory tumor cells play a fundamental role.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.28-33
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• 2008

This paper presents a continuous-time equalizer adopting a clock loss tracking technique for digital display interface. This technique uses bottom hold circuit to detect the incoming clock loss. The generated loss signal is directly fed to equalizer filters, building adaptive feed-forward loops which contribute the stability of the system. The design was done in $0.18{\mu}m$ CMOS technology. Experimental results summarize that eye-width of minimum 0.7UI is achieved until -33dB channel loss at 1.65Gbps. The average power consumption of the equalizer is a maximum 10mW, a very low value in comparison to those of previous researches, and the effective area is $0.127mm^2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.1
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• pp.47-53
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• 2015

In this paper, a novel fluid controlled phase tunable line using inkjet printed microfluidic composite right/left-handed(CRLH) transmission line(TL) is proposed. A CRLH-TL prototype has been inkjet-printed on a paper substrate using silver nano particle ink. In addition, a laser-etched microfluidic channel in poly methyl methacrylate(PMMA) has been integrated with the CRLH TL using inkjet-printed SU-8 as a bonding material. The proposed TL provides excellent phase-tuning capability that is dependent on the different fluidic materials used. As the fluid is changed, the proposed TL can have negative-phase, zero-phase, and positive-phase characteristics at 900 MHz and reflection coefficient is maintained to below -10 dB. The performance of the proposed TL is successfully validated using simulation and measurement results.

• Journal of the Korean Magnetics Society
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• v.22 no.1
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• pp.6-10
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• 2012

We have observed the change in the film resistance of thin nickel film up to 13 nm, which is deposited on a porous anodic alumina substrate, prepared by two-step anodization technique under phosphoric acid. The resulting film grows as a porous film, following the pore structure on the surface of the alumina substrate, and the value of the resistance lies above $150k{\Omega}$ within the range of thickness studied here, decreasing very slowly with the film thickness. The observed resistance value is much higher than the reported value of a uniform film at the same thickness. Since the observed value of the surface coverage with the pores is smaller than the critical value, expected from the percolation theory, the pore structure limits the formation of conduction channel across the film. In addition, by comparing to the typical model of thickness-dependent resistivity, we expect that the scattering at the pore edge further increases the film resistance.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.499-499
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• 2011

Silicon nanowires (Si NWs) have been extensively studied for nanoelectronics owing to their unique optical and electrical properties different from those of bulk silicon. For the development of Si NW devices, better understanding of oxidation behavior in Si NWs would be an important issue. For example, it is widely known that atomic scale roughness at the dielectric (SiOx)/channel (Si) interface can significantly affect the device performance in the nano-scale devices. However, the oxidation process at the atomic-scale is still unknown because of its complexity. In the present work, we investigated the oxidation behavior of Si NW in atomic scale by simulating the dry oxidation process using a reactive molecular dynamics simulation technique. We focused on the residual stress evolution during oxidation to understand the stress effect on oxidation behavior of Si NWs having two different diameters, 5 nm and 10 nm. We calculated the charge distribution according to the oxidation time for 5 and 10 nm Si NWs. Judging from this data, it was observed that the surface oxide layer started to form before it is fully oxidized, i.e., the active diffusion of oxygen in the surface oxide layer. However, it is well-known that the oxide layer formation on the Si NWs results in a compressive stress on the surface which may retard the oxygen diffusion. We focused on the stress evolution of Si NWs during the oxidation process. Since the surface oxidation results in the volume expansion of the outer shell, it shows a compressive stress along the oxide layer. Interestingly, the stress for the 10 nm Si NW exhibits larger compressive stress than that of 5 nm Si NW. The difference of stress level between 5 an 10 anm Si NWs is approximately 1 or 2 GPa. Consequently, the diameter of Si NWs could be a significant factor to determine the self-limiting oxidation behavior of Si NWs when the diameter was very small.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.2
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• pp.165-170
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• 2016

Nano-scale power splitter based on curved plasmonic waveguides are designed by utilizing the multimode interference (MMI) coupler. To analyze easily the adaptive properties of plasmonic curverd multimode interference coupler(PC-MMIC), the curved form transforms equivalently into a planar form by using conformal transformation method. Also, effective dielectric method and longitudinal modal transmission-line theory are used for simulating the light propagation and optimizing the structural parameters at 3-D guiding geometry. The designed $2{\times}2$ PC-MMIC does not work well for quasi-TM mode case due to the bending structure, and it does not exist 3dB coupling property, in which the power splitting ratio is 50%:50%, for quasi-TE mode case. Further, the coupling efficiency is better when the signal is incident at channel with large curvature radius than small curvature radius.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.8
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• pp.23-28
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• 2010

In this paper, comparative analysis of digital and analog performances of strained-silicon PMOSFETs with different carrier direction were performed. ID.SAT vs. ID.OFF and output resistance, Rout performances of devices with <100> carrier direction were better than those of <110> direction due to the greater carrier mobility of <100> channel direction. However, on the contrary, NBTI reliability and device matching characteristics of device with <100> carrier direction were worse than those with <110> carrier direction. Therefore, simultaneous consideration of analog and reliability characteristics as well as DC device performance is highly necessary when developing mobility enhancement technology using the different carrier direction for nano-scale CMOSFETs.