• 한국진공학회:학술대회논문집
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• 한국진공학회 2007년도 제33회 하계학술대회 초록집
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• pp.359-359
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• 2007

• 한국정밀공학회지
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• 제26권6호
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• pp.7-13
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• 2009

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2008년도 Asian Magnetics Conference
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• pp.146.1-146.1
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• 2008

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.164-165
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• 2005

The dry etch characteristics of GaAs over both AlGaAs and InGaP in planar inductively coupled $BCl_3$-based plasmas(ICP) with additions of $SF_6$ or $CF_4$ were studied. The additions of flourine gases provided enhanced etch selectivities of GaAs/AlGaAs and GaAs/InGaP. The etch stop reaction involving formation of involatile $AlF_3$ and $InF_3$ (boiling points of etch products: $AlF_3\sim1300^{\circ}C$, $InF_3$ > $1200^{\circ}C$ at atmosphere) were found to be effective under high density inductively coupled plasma condition. Decrease of etch rates of all materials was probably due to strong increase of flourine atoms in the discharge, which blocked the surface of the material against chlorine neutral adsorption. The process parameters were ICP source power (0 - 500 W), RF chuck power (0 - 30 W) and variable gas composition. The process results were characterized in terms of etch rate, selectivities of GaAs over AlGaAs and InGaP, surface morphology, surface roughness and residues after etching.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권1호
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• pp.27-31
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• 2008

We have studied nonvolatile memory properties of MOSFETs with double-stacked Si nanoclusters in the oxide-gate stacks. We formed Si nanoclusters of a uniform size distribution on a 5 nm-thick tunneling oxide layer, followed by a 10 nm-thick intermediate oxide and a second layer of Si nanoclusters by using LPCVD system. We then investigated the memory characteristics of the MOSFET and observed that the charge retention time of a double-stacked Si nanocluster MOSFET was longer than that of a single-layer device. We also found that the double-stacked Si nanocluster MOSFET is suitable for use as a dual-bit memory.

• 한국고분자학회지:고분자과학과기술
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• 제24권4호
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• pp.347-351
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• 2013

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2006년도 동계학술연구발표회 및 자성 스핀트로닉스 국제학술대회
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• pp.126-127
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• 2006

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1386-1389
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• 2006

In this study, a plasma flat fluorescent lamp having a new structure was fabricated by screen printing technique. Coplanar types of silver electrodes with a dielectric layer were screen-printed on a rear glass plate, and then fired at $550^{\circ}C$ and $580^{\circ}C$, respectively. Phosphor was spin-coated on the dielectric layer with firing at $490^{\circ}C$. Several types of lamps were designed and its properties wee investigated with electrode shape, gas pressure, etc.

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2015년도 자성 및 자성재료 국제학술대회
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• pp.185-185
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• 2015

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2006년도 춘계학술대회 논문집
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• pp.105-108
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• 2006

It has been issued to fabricate nano-scale patterns with large-scale in the field of digital display. Also, large-scale fabrication technology of nano pattern is very important not only for the field of digital display but also for the most of applications of the nano-scale patterns in the view of the productivity. Among the fabrication technologies, UV nano imprinting process is suitable for replicating polymeric nano-scale patterns. However, in case of conventional UV nano imprinting process using flat mold, it is not easy to replicate large areal nano patterns. Because there are several problems such as releasing, uniformity of the replica, mold fabrication and so on. In this study, to overcome the limitation of the conventional UV nano imprinting process, we proposed a continuous UV nano imprinting process using a pattern roll stamper. A pattern roll stamper that has nano-scale patterns was fabricated by attaching thin metal stamper to a roll base. A continuous UV nano imprinting system was designed and constructed. As practical examples of the process, various nano patterns with pattern size of 500, 150 and 50nm were fabricated. Finally, geometrical properties of imprinted nano patterns were measured and analyzed.