• Journal of the Korean Crystal Growth and Crystal Technology
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• v.11 no.5
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• pp.224-230
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• 2001

The characteristics of $NO/N_2O$ annealed reoxidized nitrided oxide being studied as super thin gate oxide and gate dielectric layers of Non-Volatile Semiconductor Memory (NVSM) were investigated by Dynamic Secondary Ion Mass Spectrometry (D-SIMS), Time-of-Flight Secondary Ion Mass Spectrometry (ToF-SIMS), and Auger Electron Spectroscopy (AES). The specimen was annealed by $NO/N_2O$ after initial oxide process and then rcoxidized for nitrogen redistribution in nitrided oxide. Out-diffusion of incorporated nitrogen during the wet oxidation in reoxidation process took place more strongly than that of the dry oxidation. It seems to indicate that hydrogen plays a role in breaking the Si N bonds. As reoxidation proceeds, incorporated nitrogen of $NO/N_2O$ annealed nitrided oxide is obsen-ed to diffuse toward the surface and substrate at the same time. ToF-SIMS results show that SiON species are detected at the initialoxide interface, and Si,NO species near the new $Si_2NO$ interface that formed after reoxidation. These SiON and $Si_2NO$ species most likely to relate to the origin of the state of memory charge traps in reoxidized nitrided oxide, because nitrogen dangling bonds of SiON and silicon dangling bonds of $Si_2NO$ are contained defects associated with memory effect.

• Proceedings of the Korean Powder Metallurgy Institute Conference
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• 2006.09b
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• pp.1015-1016
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• 2006

The microstructures and properties of pure molybdenum wire and $Mo-La_2O_3$ alloy wire annealed at different temperatures are investigated systematically in this paper. It is shown that the recrystallization temperature, toughness and strength at room temperature of this wire was increased greatly by addition of $La_2O_3$. The room temperature embrittlement of this wire annealed at high temperature is improved remarkably.

• 한국태양에너지학회:학술대회논문집
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• 2009.04a
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• pp.230-234
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• 2009

It is significant technique to increase competitiveness that solar cells have a high energy conversion efficiency and cost effectiveness. When making high efficiency crystalline Si solar cells, evaporated Ti/Pd/Ag contact system is widely used in order to reduce the electrical resistance of the contact fingers. However, the evaporation process is no applicable to mass production because high vacuum is needed. Furthermore, those metals are too expensive to be applied for terrestrial applications. Ni/Cu/Ag contact system of silicon solar cells offers a relatively inexpensive method of making electrical contact. Ni silicide formation is one of the indispensable techniques for Ni/Cu/Ag contact sytem. Ni was electroless plated on the front grid pattern, After Ni electroless plating, the cells were annealed by RTP(Rapid Thermal Process). Ni silicide(NiSi) has certain advantages over Ti silicide($TiSi_2$), lower temperature anneal, one step anneal, low resistivity, low silicon consumption, low film stress, absence of reaction between the annealing ambient. Ni/Cu/Ag metallization scheme is an important process in the direction of cost reduction for solar cells of high efficiency. In this article we shall report an investigation of rapid thermal silicidation of nickel on silngle crystalline silicon wafers in the annealing range of $350-390^{\circ}C$. The samples annealed at temperatures from 350 to $390^{\circ}C$ have been analyzed by SEM(Scanning Electron Microscopy).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.11a
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• pp.7-10
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• 1992

CoNiCr/Cr and CoCrTa/Cr for longitudinal magnetic recording media were. prepared on Coming 7059 glass by RF magnetron sputtering. The thickness of Cr underlayer was varied from 500 to $3000{\AA}$ and. that of magnetic layer was $700{\AA}$. Coercivity and squareness were measured using V.S.M.(vibrating sample magnetometer). The coercivity of films increased with increasing Cr thickness when the films were unannealed. The coercivity of the films annealed in a 10 mtorr vacuum increased initially with annealing time and then saturated with further increase in annealing time. The coercivity value difference between the unannealed and annealed films increased with increasing the thickness of Cr underlayer No significant change was found in squareness after anneal, regardless of Cr underlayer thickness.

• Journal of the Korean Vacuum Society
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• v.8 no.4A
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• pp.490-495
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• 1999

In 0.18 $\mu \textrm m$ LOGIC device, the etch rate of NMOS polysilicons is different from that of PMOS polysilicons due to the state of polysilicon to manufacture gate line. To control the etch profile, we tested the ratio of $Cl_2$/HBr gas and the total chamber pressure, and also we reduced Back He pressure to get the vertical profile. In the case of manufacturing the gate photoresist line, we used Bottom Anti-Reflective Coating (BARC) to protect refrection of light. As a result we found that $CF_4O_2$ gas is good to etch BARC, because of high selectivity and good photoresist line profile after etching BARC. in the results of the characterization of plasma damage to the antenna effect of gate oxide, NO type thin film(growing gate oxide in 0, ambient followed by an NO anneal) is better than wet type thin film(growing gate oxide in $0_2+H_2$ ambient).

• Korean Journal of Materials Research
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• v.15 no.5
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• pp.313-317
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• 2005

The relation between bulk microdefect (BMD) and mechanical strength of $P/P^-$ epitaxial silicon wafers (Epitaxial wafer) as a function of nitrogen concentrations was studied. After 2 step anneal$(800^{\circ}C/4hrs+1000^{\circ}C/16hrs)$, BMD was not observed in nitrogen undoped epitaxial silicon wafer while BMD existed and increased up to $3.83\times10^5\;ea/cm^2$ by addition of $1.04\times10^{14}\;atoms/cm^3$ nitrogen doping. The slip occurred for nitrogen undoped and low level nitrogen doped epitaxial wafers. However, there was no slip occurrence above $7.37\times10^{13}\;atoms/cm^3$ nitrogen doped epitaxial wafer. Mechanical strength was improved from 40 to 57 MPa as nitrogen concentrations were increased. Therefore, the nitrogen doping in silicon wafer plays an important role to improve BMD density, slip occurrence and mechanical strength of the epitaxial silicon wafers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.12
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• pp.1283-1288
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• 2004

Metal-ferroelectric-insulator-semiconductor(WFIS) capacitors using rapid thermal annealed LiNbO$_3$/AlN/Si(100) structure were fabricated and demonstrated nonvolatile memory operations. The capacitors on highly doped Si wafer showed hysteresis behavior like a butterfly shape due to the ferroelectric nature of the LiNbO$_3$ films. The typical dielectric constant value of LiNbO$_3$ film in the MFIS device was about 27, The gate leakage current density of the MFIS capacitor was 10$^{-9}$ A/cm$^2$ order at the electric field of 500 kV/cm. The typical measured remnant polarization(2P$_{r}$) and coercive filed(Ec) values were about 1.2 $\mu$C/cm$^2$ and 120 kV/cm, respectively The ferroelectric capacitors showed no polarization degradation up to 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulses of 1 MHz. The switching charges degraded only by 10 % of their initial values after 4 days at room temperature.e.

• Journal of the Korean institute of surface engineering
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• v.29 no.1
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• pp.3-14
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• 1996

High temperature anneal of W-rich silicides, inferior to adherence compared with Si-rich silicides, resulted in the film peeling off from the Si-substrate when WSix thickness reached more than critical thickness. Investigation of the W-rich silicide films peeling off from the substrate revealed that the voids underneath the $WSi_2$ produced through silicide reaction were responsible for the poor adherence of W-rich silicide. In addition, internal stress in the film increased as the silicide thickness increased. In order to promote the adhesion of WSix to Si-substrate, thin Ti-layer was formed between WSi and Si-substrate(WSix/Ti/Si). No voids were observed in $WSi_2$/Ti/Si $N_2$-annealed at $1000^{\circ}C$, thereby leading to an increase of the critical thickness from ～1700$\AA$ to more than 2500$\AA$. However, higher resisiti-vity was obtained in WSix/Ti/Si than in WSix/Si. Finally, different silicide reaction mechanism for the structures(WSix/Si, WSix/Ti/Si) was proposed to explain the formation of voids as well as the role of thin Ti-layer.

• Journal of the Optical Society of Korea
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• v.20 no.1
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• pp.130-134
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• 2016

The influence of Au/Ni-based contact formed on a lightly-doped (7.3×1017cm−3, Zn-doped) InGaAsP layer for electrical compensation of surface plasmon polariton (SPP) propagation under various rapid thermal annealing (RTA) conditions has been studied. The active control of SPP propagation is realized by electrically pumping the InGaAsP multiple quantum wells (MQWs) beneath the metal planar waveguide. The metal planar film acts as the electric contact layer and SPP waveguide, simultaneously. The RTA process can lower the metal-semiconductor electric contact resistance. Nevertheless, it inevitably increases the contact interface morphological roughness, which is detrimental to SPP propagation. Based on this dilemma, in this work we focus on studying the influence of RTA conditions on electrical control of SPPs. The experimental results indicate that there is obvious degradation of electrical pumping compensation for SPP propagation loss in the devices annealed at 400℃ compared to those with no annealing treatment. With increasing annealing duration time, more significant degradation of the active performance is observed even under sufficient current injection. When the annealing temperature is set at 400℃ and the duration time approaches 60s, the SPP propagation is nearly no longer supported as the waveguide surface morphology is severely changed. It seems that eutectic mixture stemming from the RTA process significantly increases the metal film roughness and interferes with the SPP signal propagation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.7
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• pp.605-610
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• 2006

We have investigated $Al_{0.25}Ga_{0.75}As/In_{0.2}Ga_{0.8}As$ structures for pseudomorphic high electron mobility transistor(pHEMT), which were grown by molecular beam epitaxy(MBE) and consequently annealed by rapid thermal anneal(RTA), using Hall measurement, photoluminescence, and transmission electron microscopy (TEM). According to intensity and full-width at half maximum maintained stable at the same energy level, the quantized energy level in $Al_{0.25}Ga_{0.75}As/In_{0.2}Ga_{0.8}As$ quantum wells was independent of the RTA conditions. However, the Hall mobility was decreased from $6,326cm^2/V.s\;to\;2,790cm^2/V.s\;and\;2,078cm^2/V.s$ after heat treatment respectively at $500^{\circ}C\;and\;600^{\circ}C$. The heat treatment which is indispensable during the fabrication procedure would cause catastrophic degradation in electrical transport properties. TEM observation revealed atomically non-uniform interfaces, but no dislocations were generated or propagated. From theoretical consideration about the mobility changes owing to inter-diffusion, the degraded mobility could be directly correlated to the interface scattering as long as samples were annealed below $600^{\circ}C$ lot 1 min.