• Title/Summary/Keyword: NDRO

Search Result 22, Processing Time 0.048 seconds

Design and Measurements of an RSFQ NDRO circuit (단자속 양자 NDRO 회로의 설계와 측정)

  • 정구락;홍희송;박종혁;임해용;강준희;한택상
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
    • /
    • 2003.10a
    • /
    • pp.76-78
    • /
    • 2003
  • We have designed and tested an RSFQ (Rapid Single Flux Quantum) NDRO (Non Destructive Read Out) circuit for the development of a high speed superconducting ALU (Arithmetic Logic Unit). When designing the NDRO circuit, we used Julia, XIC and Lmeter for the circuit simulations and layouts. We obtained the simulation margins of larger than $\pm$25%. For the tests of NDRO operations, we attached the three DC/SFQ circuits and two SFQ/DC circuits to the NDRO circuit. In tests, we used an input frequency of 1 KHz to generate SFQ Pulses from DC/SFQ circuit. We measured the operation bias margin of NDRO to be $\pm$15%. The circuit was measured at the liquid helium temperature.

  • PDF

Design and Simulation of an RSFQ 1-bit ALU (RSFQ 1-bit ALU의 디자인과 시뮬레이션)

  • 김진영;백승헌;강준희
    • Progress in Superconductivity
    • /
    • v.5 no.1
    • /
    • pp.21-25
    • /
    • 2003
  • We have designed and simulated an 1-bit ALU (Arithmetic Logic Unit) by using a half adder. An ALU is the part of a computer processor that carries out arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We constructed an 1-bit ALU by using only one half adder and three control switches. We designed the control switches in two ways, dc switch and NDRO (Non Destructive Read Out) switch. We used dc switches because they were simple to use. NDRO pulse switches were used because they can be easily controlled by control signals of SET and RESET and show fast response time. The simulation results showed that designed circuits operate correctly and the circuit minimum margins were +/-27%. In this work, we used simulation tools of XIC and WRSPICE. The circuit layouts were also performed. The circuits are being fabricated.

  • PDF

Simulation of RSFQ D/A converter to use as a voltage standard (전압표준용 RSFQ DAC의 전산모사 실험)

  • Chu, Hyung-Gon;Kang, Joon-Hee
    • 한국초전도학회:학술대회논문집
    • /
    • v.10
    • /
    • pp.160-164
    • /
    • 2000
  • Digital to analog converters based on the Josephson effect are promising for voltage standard, because they produce voltage steps with high precision and good stability. In this paper, we made a simulation study on RSFQ D/A converter. RSFQ D/A converter was composed of NDRO cells, T(toggle) flip-flops, D flip-flops, Splitters and Confluence Buffers. Confluence Buffer was used to reset the D/A converter. We also obtained operating margins of the important circuit values by simulational experiments.

  • PDF

Simulation of RSFQ D/A Converter

  • 추형곤;김규태;강준희
    • Progress in Superconductivity
    • /
    • v.3 no.2
    • /
    • pp.172-177
    • /
    • 2002
  • Superconductive digital to analog converters (DAC) based on Josephson effect produce the voltage steps with high precision and good stability Therefore, they can be applied to obtain a very accurate ac voltage standard. In this paper, we made a simulation study of Rapid Single Flux Quantum (RSFQ) DAC. RSFQ DAC was composed of Non-destructive Head Out (NDRO) cells, T flip-flops, D flip-flops, Splitters, and Confluence Buffers. Confluence Buffer was used in resetting the DACs. We also obtained operating margins of the important circuit parameters in simulations.

  • PDF