• 한국수학사학회지
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• 제14권2호
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• pp.149-154
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• 2001

In this paper we represent the Ahlfors function on the multiply connected planar domain, especially on an annulus and apply it to the Caratheodory metric.

• 한국펄프종이공학회:학술대회논문집
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• 한국펄프종이공학회 2004년도 춘계학술발표논문집
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• pp.2-6
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• 2004

• 한국펄프종이공학회:학술대회논문집
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• 한국펄프종이공학회 2003년도 춘계학술발표논문집
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• pp.169-169
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• 2003

• 한국펄프종이공학회:학술대회논문집
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• 한국펄프종이공학회 2004년도 추계학술발표집
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• pp.233-237
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• 2004

• Smart Structures and Systems
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• 제21권4호
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• pp.469-477
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• 2018

This paper presents a numerical solution for the thick cylinders made of functionally graded materials (FGMs) with a constant Poisson's ratio and an arbitrary Young's modulus. We define two fundamental solutions which are derived from an ordinary differential equation under two particular initial boundary conditions. In addition, for the single layer case, we can define the transfer matrix N. The matrix gives a relation between the values of stress and displacement at the interior and exterior points. By using the assumed boundary condition and the transfer matrix, we can obtain the final solution. The transfer matrix method also provides an effective way for the solution of multiply layered cylinder. Finally, a lot of numerical examples are present.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.349-352
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• 2000

In this paper, a SIMD 64bit MAC (Multiply -Accumulate) unit is designed. It is composed of two 32bit MAC unit which supports SIMD 16bit operations. As a result, It can process two 32bit MAC operations or four 16bit operations in one cycle. Proposed MAC unit is described in Verilog HDL. After functional verification is performed, MAC unit is synthesized and optimized with 0.35$\mu\textrm{m}$ standard cell library. The synthesis result shows that this MAC unit can operate at 80㎒ of clock frequency in 85$^{\circ}C$, 3.0V, worst case process and 125㎒ of clock frequency at 25$^{\circ}C$, 3.3V, typical case process. It achieves 320Mops of performance, and is suitable for embedded DSP processors.

• 펄프종이기술
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• 제47권4호
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• pp.38-45
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• 2015

Fold cracking is one of quality troubles of coated papers. In this study, the fold cracking of high grammage ($250g/m^2$) coated paper made with the different pulp composition and layer structure of base paper was investigated. The single layered, high grammage base paper was prepared by mixing of hardwood and softwood bleached kraft pulp fibers with the different ratios. The high grammage coated paper showed the higher fold cracking than low grammage coated paper because of the increase in thickness. The increase in the content of softwood pulp fibers reduced the fold cracking in the case of high grammage coated paper. When the creasing process was conducted before folding process, the fold cracking of coated paper decreased. By manufacturing the base paper with multiply structure, the fold cracking of coated paper could be reduced significantly, especially when the BCTMP and OCC were used as a middle layer and the creasing process was carried out. The delamination of layers in base paper affected the fold cracking positively.

• 전기전자학회논문지
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• 제25권1호
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• pp.10-14
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• 2021

본 논문에서는 기존 CIE1931 색 좌표계를 이용한 색상 보정 연산의 복잡성을 개선한 하드웨어를 제안한다. 기존 알고리즘은 연산 과정에서 큰 비트 수를 계산하기 위해 사용되는 4-Split Multiply 연산으로 인해 하드웨어가 커지는 단점이 있다. 제안하는 알고리즘은 기존 알고리즘의 정의된 R2X, X2R 연산을 미리 계산하여 하나의 행렬로 만들어 영상에 적용함으로써 연산량 감소와 하드웨어 크기 감소가 가능하다. Verilog로 설계된 하드웨어의 Xilinx 합성 결과를 비교함으로써 하드웨어 자원 감소와 4K 환경 실시간 처리를 위한 성능을 확인할 수 있다. 또한, FPGA 보드에서의 실행 결과를 제시함으로써 하드웨어 탑재 동작을 검증하였다.

• 한국초전도ㆍ저온공학회논문지
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• 제14권2호
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• pp.20-23
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• 2012

With continuous development of the 2nd generation HTS conductor, the critical current of the conductor is also increasing. However, many applications require more than 2 conductors in parallel to transport large current. Applications such as HTS power cables and some HTS current leads usually need much larger transport current than that provided by a single conductor and they require more than several tens of HTS conductors. In the case of parallel connection of multiple HTS conductors, the current distribution depends on the contact resistance of each conductor at the terminals for DC operation. The non-uniform distribution of the terminal resistances results in a non-uniform distribution of the current. The resultant current non-uniformity affects on the measurement of the I-V curve and the thermal performance of the multiple conductors. This paper describes the I-V curves obtained from multiply connected HTS conductors with different terminal contact resistances to investigate the relationship between the distorted I-V curve and heat generation.

• 디지털산업정보학회논문지
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• 제10권1호
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• pp.113-120
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• 2014

In this paper, I present a new echo canceller using the adaptive cascade system identification (CSI) method, which a system response is divided into several responses so that each response is adaptively estimated and combined. Echo cancellation is required for a dual-duplex DSL, in order to allow each individual loop to operate in a full duplex fashion. Echo cancellation was one of the most difficult aspects of DSL design, requiring high linearity and total echo return loss in excess of 70 dB. Especially, for a fickle response, if the response is estimated by an adaptive filter, the filter needs more taps and the performance is decreased. But the response is divided into several responses, the computation complexities are decreased and the performance is increased. For the stage constant n, which represents the number of stages, if the response is not divided (n=1), the computation complexity of multiply is $2N^2$. And if the response is divided into two responses (n=2), the computation complexity of multiply is $2N^2$. Also, if n=3, the computation complexity is ${\frac{2}{3}}N^2$. Therefore, it is known that the computation complexity is decreased as n is increased. Finally, this proposed method is verified through simulation of echo canceller for digital subscriber line (DSL) application.