• Title/Summary/Keyword: Multiple gate drive

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Isolated Power Supply for Multiple Gate Drivers using Wireless Power Transfer System with Single-Antenna Receiver

  • Lim, Chang-Jong;Park, Shihong
    • Journal of Power Electronics
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    • v.17 no.5
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    • pp.1382-1390
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    • 2017
  • This paper presents a power supply for gate drivers, which uses a magnetic resonance wireless power transfer system. Unlike other methods where multiple antennas are used to supply power for the gate drivers, the proposed method uses a single antenna in an insulated receiver to make multiple mutually isolated power supplies. The power transmitted via single antenna is distributed to multiple power supplies for gate drivers through resonant capacitors connected in parallel that also block DC bias. This approach has many advantages over other methods, where each gate driver needs to be supplied with power using multiple receiver antennas. The proposed method will therefore lead to a reduction in production costs and circuit area. Because the proposed circuit uses a high resonance frequency of 6.78 MHz, it is possible to implement a transmitter and a receiver using a small-sized spiral printed-circuit-board-type antenna. This paper used a single phase-leg circuit configuration to experimentally verify the performance characteristics of the proposed method.

High-Performance Metal-Substrate Power Module for Electrical Applications

  • Kim, Jongdae;Oh, Jimin;Yang, Yilsuk
    • ETRI Journal
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    • v.38 no.4
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    • pp.645-653
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    • 2016
  • This paper demonstrates the performance of a metal-substrate power module with multiple fabricated chips for a high current electrical application, and evaluates the proposed module using a 1.5-kW sinusoidal brushless direct current (BLDC) motor. Specifically, the power module has a hybrid structure employing a single-layer heat-sink extensible metal board (Al board). A fabricated motor driver IC and trench gate DMOSFET (TDMOSFET) are implemented on the Al board, and the proper heat-sink size was designed under the operating conditions. The fabricated motor driver IC mainly operates as a speed controller under various load conditions, and as a multi-phase gate driver using an N-ch silicon MOSFET high-side drive scheme. A fabricated power TDMOSFET is also included in the fabricated power module for three-phase inverter operation. Using this proposed module, a BLDC motor is operated and evaluated under various pulse load tests, and our module is compared with a commercial MOSFET module in terms of the system efficiency and input current.

FPGA Based Robust Open Transistor Fault Diagnosis and Fault Tolerant Sliding Mode Control of Five-Phase PM Motor Drives

  • Salehifar, Mehdi;Arashloo, Ramin Salehi;Eguilaz, Manuel Moreno;Sala, Vicent
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.131-145
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    • 2015
  • The voltage-source inverters (VSI) supplying a motor drive are prone to open transistor faults. To address this issue in fault-tolerant drives applicable to electric vehicles, a new open transistor fault diagnosis (FD) method is presented in this paper. According to the proposed method, in order to define the FD index, the phase angle of the converter output current is estimated by a simple trigonometric function. The proposed FD method is adaptable, simple, capable of detecting multiple open switch faults and robust to load operational variations. Keeping the FD in mind as a mandatory part of the fault tolerant control algorithm, the FD block is applied to a five-phase converter supplying a multiphase fault-tolerant PM motor drive with non-sinusoidal unbalanced current waveforms. To investigate the performance of the FD technique, the fault-tolerant sliding mode control (SMC) of a five-phase brushless direct current (BLDC) motor is developed in this paper with the embedded FD block. Once the theory is explained, experimental waveforms are obtained from a five-phase BLDC motor to show the effectiveness of the proposed FD method. The FD algorithm is implemented on a field programmable gate array (FPGA).

Filed Programmable Logic Control and Test Pattern Generation for IoT Multiple Object switch Control (사물인터넷 환경에서 다중 객체 스위치 제어를 위한 프로그래밍 가능한 로직제어 및 테스트 패턴 형성)

  • Kim, Eung-Ju;Jung, Ji-Hak
    • Journal of Internet of Things and Convergence
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    • v.6 no.1
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    • pp.97-102
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    • 2020
  • Multi-Channel Switch ICs for IoT have integrated several solid state structure low ON-resistance bi-directional relay MOS switches with level shifter to drive high voltage and they should be independently controlled by external serialized logic control. These devices are designed for using in applications requiring high-voltage switching control by low-voltage control signals, such as medical ultra-sound imaging, ink-jet printer control, bare board open/short and leakage test system using Kelvin 4-terminal measurement method. This paper describes implementation of analog switch control block and its verification using Field programmable Gate Array (FPGA) test pattern generation. Each block has been implemented using Verilog hardware description language then simulated by Modelsim and prototyped in a FPGA board. Compare to conventional IC, The proposed architecture can be applied to fields where multiple entities need to be controlled simultaneously in the IoT environment and the proposed pattern generation method can be applied to test similar types of ICs.

Characterization and Comparison of Doping Concentration in Field Ring Area for Commercial Vertical MOSFET on 8" Si Wafer (8인치 Si Power MOSFET Field Ring 영역의 도핑농도 변화에 따른 전기적 특성 비교에 관한 연구)

  • Kim, Gwon Je;Kang, Ye Hwan;Kwon, Young-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.4
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    • pp.271-274
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    • 2013
  • Power Metal Oxide Semiconductor Field Effect Transistor's (MOSFETs) are well known for superior switching speed, and they require very little gate drive power because of the insulated gate. In these respects, power MOSFETs approach the characteristics of an "ideal switch". The main drawback is on-resistance RDS(on) and its strong positive temperature coefficient. While this process has been driven by market place competition with operating parameters determined by products, manufacturing technology innovations that have not necessarily followed such a consistent path have enabled it. This treatise briefly examines metal oxide semiconductor (MOS) device characteristics and elucidates important future issues which semiconductor technologists face as they attempt to continue the rate of progress to the identified terminus of the technology shrink path in about 2020. We could find at the electrical property as variation p base dose. Ultimately, its ON state voltage drop was enhanced also shrink chip size. To obtain an optimized parameter and design, we have simulated over 500 V Field ring using 8 Field rings. Field ring width was $3{\mu}m$ and P base dose was $1e15cm^2$. Also the numerical multiple $2.52cm^2$ was obtained which indicates the doping limit of the original device. We have simulated diffusion condition was split from $1,150^{\circ}C$ to $1,200^{\circ}C$. And then $1,150^{\circ}C$ diffusion time was best condition for break down voltage.