• Title/Summary/Keyword: Multiple Robot System

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A 3-D Vision Sensor Implementation on Multiple DSPs TMS320C31 (다중 TMS320C31 DSP를 사용한 3-D 비젼센서 Implementation)

  • Oksenhendler, V.;Bensrhair, Abdelaziz;Miche, Pierre;Lee, Sang-Goog
    • Journal of Sensor Science and Technology
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    • v.7 no.2
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    • pp.124-130
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    • 1998
  • High-speed 3D vision systems are essential for autonomous robot or vehicle control applications. In our study, a stereo vision process has been developed. It consists of three steps : extraction of edges in right and left images, matching corresponding edges and calculation of the 3D map. This process is implemented in a VME 150/40 Imaging Technology vision system. It is a modular system composed by a display, an acquisition, a four Mbytes image frame memory, and three computational cards. Programmable accelerator computational modules are running at 40 MHz and are based on TMS320C31 DSP with a $64{\times}32$ bit instruction cache and two $1024{\times}32$ bit internal RAMs. Each is equipped with 512 Kbytes static RAM, 4 Mbytes image memory, 1 Mbytes flash EEPROM and a serial port. Data transfers and communications between modules are provided by three 8 bit global video bus, and three local configurable pipeline 8 bit video bus. The VME bus is dedicated to system management. Tasks between DSPs are distributed as follows: two DSPs are used to edges detection, one for the right image and the other for the left one. The last processor computes the matching process and the 3D calculation. With $512{\times}512$ pixels images, this sensor generates dense 3D maps at a rate of about 1 Hz depending of the scene complexity. Results can surely be improved by using a special suited multiprocessors cards.

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Ontology-Based Dynamic Context Management and Spatio-Temporal Reasoning for Intelligent Service Robots (지능형 서비스 로봇을 위한 온톨로지 기반의 동적 상황 관리 및 시-공간 추론)

  • Kim, Jonghoon;Lee, Seokjun;Kim, Dongha;Kim, Incheol
    • Journal of KIISE
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    • v.43 no.12
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    • pp.1365-1375
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    • 2016
  • One of the most important capabilities for autonomous service robots working in living environments is to recognize and understand the correct context in dynamically changing environment. To generate high-level context knowledge for decision-making from multiple sensory data streams, many technical problems such as multi-modal sensory data fusion, uncertainty handling, symbolic knowledge grounding, time dependency, dynamics, and time-constrained spatio-temporal reasoning should be solved. Considering these problems, this paper proposes an effective dynamic context management and spatio-temporal reasoning method for intelligent service robots. In order to guarantee efficient context management and reasoning, our algorithm was designed to generate low-level context knowledge reactively for every input sensory or perception data, while postponing high-level context knowledge generation until it was demanded by the decision-making module. When high-level context knowledge is demanded, it is derived through backward spatio-temporal reasoning. In experiments with Turtlebot using Kinect visual sensor, the dynamic context management and spatio-temporal reasoning system based on the proposed method showed high performance.

Performance Simulation of Various Feature-Initialization Algorithms for Forward-Viewing Mono-Camera-Based SLAM (전방 모노카메라 기반 SLAM 을 위한 다양한 특징점 초기화 알고리즘의 성능 시뮬레이션)

  • Lee, Hun;Kim, Chul Hong;Lee, Tae-Jae;Cho, Dong-Il Dan
    • Journal of Institute of Control, Robotics and Systems
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    • v.22 no.10
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    • pp.833-838
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    • 2016
  • This paper presents a performance evaluation of various feature-initialization algorithms for forward-viewing mono-camera based simultaneous localization and mapping (SLAM), specifically in indoor environments. For mono-camera based SLAM, the position of feature points cannot be known from a single view; therefore, it should be estimated from a feature initialization method using multiple viewpoint measurements. The accuracy of the feature initialization method directly affects the accuracy of the SLAM system. In this study, four different feature initialization algorithms are evaluated in simulations, including linear triangulation; depth parameterized, linear triangulation; weighted nearest point triangulation; and particle filter based depth estimation algorithms. In the simulation, the virtual feature positions are estimated when the virtual robot, containing a virtual forward-viewing mono-camera, moves forward. The results show that the linear triangulation method provides the best results in terms of feature-position estimation accuracy and computational speed.

Optimum Design of Underwater Connector Hole Arrangement for Deep-sea Pressure Vessel Cover Plate (심해 압력용기 덮개판의 수중 커넥터홀 배치 최적설계)

  • Lee, Minuk;Park, Soung-Jea;Yeu, Tae-Kyeong;Ki, Hyong-Woo;Hong, Sup;Cho, Su-Gil;Jang, Jun-Yong;Lee, Tae Hee;Choi, Jong-Su
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.36 no.12
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    • pp.1627-1633
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    • 2012
  • A deep-sea pressure vessel needs to protect the internal electrical equipment from the high external pressure. Thus, the pressure vessel should be designed to be watertight and structurally safe. In this study, a cylindrical-type pressure vessel comprising a hollow cylinder and cover plates at both ends is investigated. For communication between the internal electronic equipment and the external device, holes are bored on the cover plate to install underwater connectors. Considering the type of internal equipment and underwater connector specifications, multiple holes may be required. These holes can affect the structural safety of the pressure vessel cover plate. In this study, the optimum design of the hole arrangement in consideration of the structural safety of the cover plate was performed.

Hardware Approach to Fuzzy Inference―ASIC and RISC―

  • Watanabe, Hiroyuki
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.975-976
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    • 1993
  • This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

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QRAS-based Algorithm for Omnidirectional Sound Source Determination Without Blind Spots (사각영역이 없는 전방향 음원인식을 위한 QRAS 기반의 알고리즘)

  • Kim, Youngeon;Park, Gooman
    • Journal of Broadcast Engineering
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    • v.27 no.1
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    • pp.91-103
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    • 2022
  • Determination of sound source characteristics such as: sound volume, direction and distance to the source is one of the important techniques for unmanned systems like autonomous vehicles, robot systems and AI speakers. There are multiple methods of determining the direction and distance to the sound source, e.g., using a radar, a rider, an ultrasonic wave and a RF signal with a sound. These methods require the transmission of signals and cannot accurately identify sound sources generated in the obstructed region due to obstacles. In this paper, we have implemented and evaluated a method of detecting and identifying the sound in the audible frequency band by a method of recognizing the volume, direction, and distance to the sound source that is generated in the periphery including the invisible region. A cross-shaped based sound source recognition algorithm, which is mainly used for identifying a sound source, can measure the volume and locate the direction of the sound source, but the method has a problem with "blind spots". In addition, a serious limitation for this type of algorithm is lack of capability to determine the distance to the sound source. In order to overcome the limitations of this existing method, we propose a QRAS-based algorithm that uses rectangular-shaped technology. This method can determine the volume, direction, and distance to the sound source, which is an improvement over the cross-shaped based algorithm. The QRAS-based algorithm for the OSSD uses 6 AITDs derived from four microphones which are deployed in a rectangular-shaped configuration. The QRAS-based algorithm can solve existing problems of the cross-shaped based algorithms like blind spots, and it can determine the distance to the sound source. Experiments have demonstrated that the proposed QRAS-based algorithm for OSSD can reliably determine sound volume along with direction and distance to the sound source, which avoiding blind spots.