• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제51권11호
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• pp.645-651
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• 2002

In this paper, a multilevel PWM inverter employing a cascaded transformer is presented to reduce the harmonics of output voltage and load currents. The proposed PWM inverter consists of two full-bridge modules and their corresponding transformers. The secondarics of each transformer are series-connected. So continuous output voltage levels can be synthesized from the suitable selection of the turns ratio of trasformer. And it appears an integral ratio to input DC source. Because of the cascaded connection of transformers, output filter inductor is not necessary. The operational principles and analysis are explained, and it is compared with a conventional isolated H-bridge PWM inverter. The validity of proposed multilevel inverter is verified through simulated and experimental waveform and their FFT results.

• 전기학회논문지
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• 제64권5호
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• pp.718-725
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• 2015

This paper proposes a novel level-shifted PWM (LS-PWM) strategy for fault tolerant cascaded multilevel inverter. Most proposed fault-tolerant operation methods in many of studies are based on a phase-shifted PWM (PS-PWM) method. To apply these methods to multilevel inverter systems using LS-PWM, two additional steps will be implemented. During the occurrence of a single-inverter-cell fault, the carrier bands scheme is reconfigured and modulation levels of inverter cells are reassigned in this proposed fault-tolerant operation. The proposed strategy performs balanced three-phase line-to-line voltages and line currents when a switching device fault occurs in a cascaded multilevel inverter using LS-PWM. Simulation and experimental results are included in the paper to verify the proposed method.

• Journal of Power Electronics
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• 제16권1호
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• pp.340-350
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• 2016

A cascaded hybrid multilevel inverter including a reconfiguration technique for low voltage dc distribution applications is proposed in this paper. A PWM generation fault detection and reconfiguration paradigm after an inverter cell fault are developed by using only a single-chip controller. The proposed PWM technique is also modified to reduce switching losses. In addition, the proposed topology can reduce the number of required power switches compared to the conventional cascaded multilevel inverter. The proposed technique is validated by using a 3-kVA prototype. The switching losses of the proposed multilevel inverter are also investigated. The experimental results show that the proposed hybrid inverter can improve system efficiency, reliability and cost effectiveness. The efficiency of proposed system is 97.45% under the tested conditions. The proposed hybrid inverter topology is a promising method for low voltage dc distribution and can be applied for the multiple loads which are required in a data center or telecommunication building.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제53권7호
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• pp.452-461
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• 2004

A novel multilevel PWM inverter is presented for the use of stand-alone photovoltaic power generation system. In appearance, it consists of three full-bridge modules and three cascaded transformers; therefore, the configuration of the proposed multilevel PW inverter is equal to that of a prior 11-level PWM inverter. Only the turn-ratio of a transformer and its corresponding switching function are different from each other. Owing to these differences, the proposed 19-level PWM inverter has two promising advantages. First, output voltage levels increase almost twofold. Consequently, it can generate more sinusoidal output voltage waveform. Second, due to a revised switching pattern, it lightens power imposed on the transformer, which is used for compensating output voltages with chopped pulses between steps. The validity of the proposed inverter system is verified by computer-aided simulations and experimental results based on a 1 ［kW］ prototype. The performance of the proposed 19-level PWM inverter is compared with the Prior 11-level PWM inverter and other counterparts.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.21-26
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• 1997

Multilevel Inverter for the application of IM system is modeled, analyzed the harmonics component of output current at SIMULINK environment. In this paper Optimum of fc, M in 5-Level PWM Inverter is proposed.

• Journal of Power Electronics
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• 제15권5호
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• pp.1227-1234
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• 2015

The efficient electric power demand management in electric power supply industry is currently being changed by distributed generation. Meanwhile, small-scale distributed generation systems using renewable energy are being constructed worldwide. Several small-scale renewable distributed generation systems, which can supply electricity to the grid at peak load of the grid as per policy such as demand response programs, could help in the stability of the electric power demand management. In this case, the power quality of the small-scale renewable distributed generation system is more significant. Low prices of power semiconductors and multilevel inverters with high power quality have been recently investigated. However, the conventional multilevel inverter topology is unsuitable for the small-scale renewable distributed generation system, because the number of devices of such topology increases with increasing output voltage level. In this paper, a single-phase multilevel inverter based on H-bridge, with DC_Link divided by bi-directional switches, is proposed. The proposed topology has almost half the number of devices of the conventional multilevel inverter topology when these inverters have the same output voltage level. Double Fourier series solution is mainly used when comparing PWM output harmonic components of various inverter topologies. Harmonic components of the proposed multilevel inverter, which have been analyzed by double Fourier series, are compared with those of the conventional multilevel inverter. An inverter prototype is then developed to verify the validity of the theoretical analysis.

• Journal of Power Electronics
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• 제12권4호
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• pp.548-558
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• 2012

In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권1호
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• pp.58-69
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• 2016

This paper describes the design and implementation of a new diode clamped multilevel inverter for variable frequency drive. The diode clamp multilevel inverter has been widely used for low power, high voltage applications due to its superior performance. However, it has some limitations such as increased number of switching devices and complex PWM control. In this paper, a new topology is proposed. New topology requires only (N-1) switching devices and (N-3) clamping diodes compared to existing topology. A modified APO-PWM control method is used to generate gate pulses for inverter. The proposed inverter topology is coupled with single phase induction motor and its performance is tested by MATLAB simulation. Finally, a prototype model has built and its performance is tested with single phase variable frequency drive.

• Journal of Power Electronics
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• 제1권1호
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• pp.36-47
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• 2001

The carrier-based space vector pulse width modulation(SVPWM), which is considered as highly simple and efficient PWM technology, can be also used in multilevel inverters. The method was originally designed for the two-level inverter and developed to the diode clamped multilevel inverter structure. however it may be noted that it also cause bad switch utilization in cascaded multilevel inverter. This paper introduces an improved carrier-based SVPWM scheme, which is fully suitable for cascaded multilevel inverter topologies because it can achieve the optimized switch utilization through the redistribution of the triangular carrier waves considering leg voltage redundancies while having the advantages of the conventional carrier-based SVPWM. Using simulation and experimental results, the superior performance of new PWM method is shown.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.1-4
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• 2003

This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.