• Journal of the Korean institute of surface engineering
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• v.48 no.4
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• pp.169-173
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• 2015

$CuInSe_2$ thin films which have been widely used for thin solar cells as a light absorber were prepared by hydrazine solution processing, and their microstructural properties were investigated. Hydrazine $CuInSe_2$ precursor solutions were prepared by dissolving $Cu_2S$, S, $In_2Se_3$ and Se powder in hydrazine solvent. Multilayer $CuInSe_2$ chalcopyrite phase thin films were prepared by repeating spin-coating process using the precursor solution. Unfortunately, the presence of the interfaces between each $CuInSe_2$ layer formed by multi-layer coating impeded grain growth across the interface. Here, by doing simple interface engineering to solve the limited grain growth issue, the large grained (${\sim}1{\mu}m$) $CuInSe_2$ thin films were obtained.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.232-232
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• 2012

The doping of semiconducting elements is essential for the development of silicon quantum dot (QD) solar cells. Especially the doping elements should be activated by substitution at the crystalline sites in the crystalline silicon QDs. However, no analysis technique has been developed for the analysis of the activated dopants in silicon QDs in $SiO_2$ matrix. Secondary ion mass spectrometry (SIMS) is a powerful technique for the in-depth analysis of solid materials and the impurities analysis of boron and phosphorus in semiconductor materials. For the study of diffusion behaviour of B and P by SIMS, Si/$SiO_2$ multilayer films doped by B or P were fabricated and annealed at high temperatures for the activated doping of B and P. The distributions of doping elements were analyzed by SIMS. Boron found to be preferentially distributed in Si layer rather than the $SiO_2$ layer. Especially the B in the Si layers was separated to two components of an interfacial component and a central one. The central component was understood as the activated elements. On the other hand, phosphorus did not show any preferred diffusion.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.426-426
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• 2012

The CIGS absorber has outstanding advantages in the absorption coefficient and conversation efficiency. The CIGS thin film solar cells have been researched for commercialization and increasing the conversion efficiency. CIG precursors were deposited on the Mo coated glass substrate by magnetron sputtering with multilayer structure, which is CuIn/CuGa/CuIn/CuGa. Then, the metallic precursors were selenized under high Se pressure by RTP method which included. Se vapor was supplied using Se cracker cell instead of toxic hydrogen selenide gas. Se beam flux was controlled by variable reservoir zone (R-zone) temperature during selenization process. Cracked Se source reacted with CIG precursors in a small quantity of Se because of small size molecules with high activation energy. The CIGS thin films were studied by FESEM, EDX, and XRD. The CIGS solar cell was also developed by layering of CdS and ZnO layers. And the conversion efficiency of the CIGS solar cell was characterization. It was reached at 6.99% without AR layer.

• Current Optics and Photonics
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• v.1 no.1
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• pp.7-11
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• 2017

In this study, multilayered graphene was easily transferred to the target substrate in one step using thermal release tape. The transmittance of the transferred graphene according to the number of layers was measured using a spectrophotometer. The sheet resistance was measured using a four-point probe system. Graphene formed using this transfer method showed almost the same electrical and optical properties as that formed using the conventional poly (methyl methacrylate) transfer method. This method is suitable for the mass production of graphene because of the short process time and easy large-area transfer. In addition, multilayered graphene can be transferred on various substrates without wetting problem using the one-step dry transfer method. In this work, this easy transfer method was used for dielectric substrates such as glass, paper and polyethylene terephthalate, and a sheet resistance of ~240 ohm/sq was obtained with three-layer graphene. By fabricating organic solar cells, we verified the feasibility of using this method for optoelectronic devices.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.36 no.10
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• pp.1049-1054
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• 2012

Continued advancements in organic materials have led to the development of organic devices that are thin, flexible, and lightweight and that can potentially be used as low-cost energy-conversion devices. While these devices have many advantages, the environmentally induced degradation of the active materials and the low-work-function electrodes remain a valid concern. Hence, many vacuum deposition processes have been applied to develop low-permeation barrier coatings. In this work, we present the results pertaining to the developed thin-film encapsulation. Multilayer encapsulation involves the use of $SiO_x$ or $SiN_x$ with parylene. The effective water vapor transmission rates were investigated using a Ca-corrosion test. The integration of the developed barrier layers was demonstrated by encapsulating pentacene/$C_{60}$ solar cells, and the results are presented.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.188.1-188.1
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• 2014

Aluminum is widely used as a material for electrode on silicon based devices. Especially, aluminum films are used as backside and front-side electrodes in silicon quantum dot (QD) solar cells. In this point, the diffusion of aluminum is very important for the enhancement of power conversion efficiency by improvement of contact property. Aluminum was deposited on a Si (100) wafer and a Si QD layer by ion beam sputter system with a DC ion gun. The Si QD layer was fabricated by $1100^{\circ}C$ annealing of the $SiO_2/SiO_1$ multilayer film grown by ion beam sputtering deposition. Cs ion beam with a low energy and a grazing incidence angle was used in SIMS depth profiling analysis to obtain high depth resolution. Diffusion behavior of aluminum in the Al/Si and Al/Si QD interfaces was investigated by secondary ion mass spectrometry (SIMS) as a function of heat treatment temperature. It was found that aluminum is diffused into Si substrate at $450^{\circ}C$. In this presentation, the effect of heat treatment temperature and Si nitride diffusion barrier on the diffusion of Al will be discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.6
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• pp.603-609
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• 2022

Passivation quality is mainly governed by epitaxial growth of crystalline silicon wafer surface. Void-rich intrinsic a-Si:H interfacial layer could offer higher resistivity of the c-Si surface and hence a better device efficiency as well. To reduce the resistivity of the contact area, a modification of void-rich intrinsic layer of a-Si:H towards more ordered state with a higher density is adopted by adapting its thickness and reducing its series resistance significantly, but it slightly decreases passivation quality. Higher resistance is not dominated by asymmetric effects like different band offsets for electrons or holes. In this study, multilayer of intrinsic a-Si:H layers were used. The first one with a void-rich was a-Si:H(I₁) and the next one a-SiO_x:H(I₂) were used, where a-SiO_x:H(I₂) had relatively larger band gap of ~2.07 eV than that of a-Si:H (I₁). Using a-SiO_x:H as I₂ layer was expected to increase transparency, which could lead to an easy carrier transport. Also, higher implied voltage than the conventional structure was expected. This means that the a-SiO_x:H could be a promising material for a high-quality passivation of c-Si. In addition, the i-a-SiO_x:H microstructure can help the carrier transportation through tunneling and thermal emission.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.1
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• pp.1-10
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• 2018

Recently, there has been rapid development in the field of flexible electronic devices, such as organic light emitting diodes (OLEDs), organic solar cells and flexible sensors. Encapsulation process is added to protect the flexible electronic devices from exposure to oxygen and moisture in the air. Using numerical simulation, we investigated the effects of the encapsulation layer on mechanical stability of the silicon chip, especially the fracture performance of center crack in multi-layer package for various loading condition. The multi-layer package is categorized in two type - a wide chip model in which the chip has a large width and encapsulation layer covers only the chip, and a narrow chip model in which the chip covers both the substrate and the chip with smaller width than the substrate. In the wide chip model where the external load acts directly on the chip, the encapsulation layer with high stiffness enhanced the crack resistance of the film chip as the thickness of the encapsulation layer increased regardless of loading conditions. In contrast, the encapsulation layer with high stiffness reduced the crack resistance of the film chip in the narrow chip model for the case of external tensile strain loading. This is because the external load is transferred to the chip through the encapsulation layer and the small load acts on the chip for the weak encapsulation layer in the narrow chip model. When the bending moment acts on the narrow model, thin encapsulation layer and thick encapsulation layer show the opposite results since the neutral axis is moving toward the chip with a crack and load acting on chip decreases consequently as the thickness of encapsulation layer increases. The present study is expected to provide practical design guidance to enhance the durability and fracture performance of the silicon chip in the multilayer package with encapsulation layer.