• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.263-266
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• 2002

In this paper, It is indicating that an issues of the conventional boost converter for high frequency induction heating. To improve those issues, it is proposed, simulated and analyzed that the current resonant circuit, simulated. As the result, we knew that the proposed circuit has a good point to improve the waveform of input current and to make high efficiency. On the other side, in the inverter for the high current power supply, it is proposed that the high frequency inverter of the half bridge topology, be done the circuit analysis to extract the optimal circuit parameter. It is making sure of the soft switching operating by the inductor to reverse parallel connected on the inverter main switch, decreasing the surge voltage when the switch is turn-off by compulsion, and repressing the switch current and bringing the high current amplitude operation by the multi resonance.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.3
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• pp.243-250
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• 2009

This paper provides an novel two-stage LED driver circuit for LED lighting equipment. The proposed driver circuit reduces voltage stress in LED driver circuit by using multi-level output voltage of PFC flyback converter. The proposed circuit satisfies IEC61000-3-2 class C regulation that is applied to lighting equipment over 25W and uses PWM to control brightness of wide extent. In this paper, the principle of proposed driver circuit is presented. A prototype has been built and tested. The experimental results are presented to show the validity of the proposed circuit.

• Journal of Navigation and Port Research
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• v.29 no.10 s.106
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• pp.859-863
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• 2005

This paper describes the improvement of power control characteristics of ship's emergency lighting power supply(SELPS), by which electric power is controlled extensively, and power ON-OFF is controlled and system parameter monitored in remote distance by PC serial communication. Proposed system is composed of step-down converter(SDC), emergency power supply circuit(EPSC), half bridge(HB) inverter, fluorescent lamp(FL) starting circuit, microprocessor control and multi communication circuit. Experimental works confirm that relative system stops when over current is detected and speedy and stable emergency power is supplied when main power source cut-off, and controls input power up to 35[$\%$] by adjusting pulse frequency of the HB inverter, and ON-OFF control of multiple SELS, real time transmission and monitor of parameters as to voltage, current, and power values are performed appropriately by PC communication.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.643-645
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• 2013

When you convert word processor files with large amounts of input data to PDF files in on/off line, current PDF conversion solutions do one of the source files to perform the conversion task in the Windows PDF virtual printer environment. Depending on the size of the original PDF file conversion speed to convert PDF to do a large amount of different and if you are performing a very slow speed. When you convert files to PDF in this sequence, depending on the capacity of the original file, PDF conversion rate is different, if automating a mass conversion to the PDF, the speed is very slow. In this paper, the PDF conversion which can use the Windows Terminal Server from one Windows Server when performing a PDF conversion processing of the source file, to create a multi-session Terminal, to perform the PDF conversion process at the same time was studied.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.4
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• pp.119-125
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• 2022

The power supply for the anti-aircraft radar homing sensor should allow the system to receive power quickly and stably without the influence of noise. For this purpose, DC-DC converters are widely used for reliable power conversion. Also, switching of DC-DC converters Frequency noise should not cause false alarms and ghosts that may affect the detection and tracking performance of the system, and it should have a check function that can monitor power in real time while the homing sensor is operating. In order to apply to anti-aircraft radar homing sensor, we developed a multi-output switching power supply with maximum output 𐩒𐩒𐩒 W, efficiency 80% or more (@100% load), output power by receiving 28VDC input, and power supply to achieve more than 80% efficiency. A DC-DC converter was applied to this large output, and the multi-output flyback method was applied to the rest of the low-power output.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.1
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• pp.53-60
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• 2004

This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.

• Journal of Satellite, Information and Communications
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• v.2 no.2
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• pp.64-68
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• 2007

This paper describes the development of RF front.end equipment of a wide band high precision satellite navigation receiver to be able to receive the currently available GPS navigation signal and the GALILEO navigation signal to be developed in Europe in the near future. The wide band satellite navigation receiver with high precision performance is composed of L - band antenna, RF/IF converters for multi - band navigation signals, and high performance baseband processor. The L - band satellite navigation antenna is able to be received the signals in the range from 1.1 GHz to 1.6 GHz and from the navigation satellite positioned near the horizon. The navigation signal of GALILEO navigation satellite consists of L1, E5, and E6 band with signal bandwidth more than 20 MHz which is wider than GPS signal. Due to the wide band navigation signal, the IF frequency and signal processing speed should be increased. The RF/IF converter has been designed with the single stage downconversion structure, and the IF frequency of 140 MHz has been derived from considering the maximum signal bandwidth and the sampling frequency of 112 MHz to be used in ADC circuit. The final output of RF/IF converter is a digital IF signal which is generated from signal processing of the AD converter from the IF signal. The developed RF front - end has the C/N0 performance over 40dB - Hz for the - 130dBm input signal power and includes the automatic gain control circuits to provide the dynamic range over 40dB.

• Journal of Biomedical Engineering Research
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• v.28 no.3
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• pp.429-440
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• 2007

A coded excitation has been studied to improve the performance for ultrasound imaging in term of SNR, imaging frame rate, contrast to tissue ratio, and so forth. However, it requires a complicated arbitrary waveform transmitter for each active channel that is typically composed of a multi-bit Digital-to-Analog Converter (DAC) and a linear power amplifier (LPA). Not only does the LPA increase the cost and size of a transmitter block, but it consumes much power, increasing the system complexity further and causing a heating-up problem. This paper proposes an optimized 1.5bit fourth order sigma-delta modulation technique applicable to design an efficient arbitrary waveform generator with greatly reduced power dissipation and hardware. The proposed SDM can provide a required SQNR with a low over-sampling ratio of 4. To this end, the loop coefficients are optimized to minimize the quantization noise power in signal band while maintaining system stability. In addition, the decision level for the 1.5 bit quantizer is optimized for a given input waveform, which results in the SQNR improvement of more than 5dB. Computer simulation results show that the SQNR of a FM(frequency modulated) signal generated by using the proposed method is about 26dB, and the peak side-lobe level (PSL) of its compressed waveform on receive is -48dB.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.12
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• pp.155-160
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• 2003

Owing to the advances in ADC and DSP technologies, signals in If band, which once had to be processed in analog technology, can new be digitally processed. This is referred to as "Digital IF" or "Digital Radio", which is a preliminary stage of SDR. Applying the digital radio technology to a multi-carrier receiver design, a processing gain is generated through an over-sampling of input data. In the digital receiver, decimation is performed for reducing the computational complexity CIC and half band filter is used together with the decimation as an anti-alising filter. The CIC filter, however, should introduce the roll-off phenomenon in the passband, which causes the receiving performance to be considerably degraded due to the distorted Passband flatness of receiving filter. In this paper, we designed a CIC roll-off compensation filter for W-CDMA digital receiver. The performance of the proposed compensation filter is confirmed through computer simulations in such a way that the BER is minimized by compensating the roll-off characteristics.off characteristics.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.115-122
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• 2016

In this paper, wideband Ku-band downconverter was designed to receiver digital satellite broadcasting. The low-nose downconverter was designed to form four local oscillator frequencies(9.75, 10, 10.75 and 11.3 GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75 GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select intermediate frequency bands by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64 dB, and the noise figure of low-noise amplifier was 0.7 dB, the P1dB of output signal 15 dBm, and the phase noise -85 dBc@10kHz at the band 1 carrier frequency of 9.75 GHz. The low noise block downconverter(LNB) for wideband digital satellite broadcasting designed in this paper can be used for global satellite broadcasting LNB.