• Korean Journal of Optics and Photonics
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• v.14 no.2
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• pp.142-145
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• 2003

The nonreciprocal phase shift characteristics of infinite slab optical waveguides with magneto-optic materials in the cladding layer was calculated at 1.55 ${\mu}{\textrm}{m}$ for optical isolators. The infinite slab waveguide structures considered in this paper were as follows. rho magneto-optic materials used as a cladding layer were Ce:YIG and LNB(LuNdBi)$_3$(FeAl)$_{5}$)$_{12}$,). Their specific Faraday rotations Θ$_{F}$ are 4500$^{\circ}$/cm, 500$^{\circ}$/cm at wavelength 1.55 ${\mu}{\textrm}{m}$ respectively. The guiding layer with multi-quantum well structure was used, and it consists of 1.3Q and InGaAs. In order to investigate the effect of evanescent field penetrating the cadding, layer, guiding mode characteristics were calculated for the cases when the substrate is InP and air. We calculated the minimum lengths of 90$^{\circ}$ nonreciprocal phase shifters and their optimum guiding layer thicknesses in various optical waveguide structures.res.s.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.381-382
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• 2007

IZO/Ag/IZO (IAI) anode films for flexible organic light emitting diodes (OLEDs) were grown on PC (polycarbonate) substrate using DC sputter (IZO) and thermal evaporator (Ag) systems as a function of Ag thickness. To investigate electrical and optical properties of IAI stacked films, 4-point probe and UV/Vis spectrometer were used, respectively. From a IAI stacked film with 12nm-thick Ag, sheet resistance of $6.9\;{\Omega}/{\square}$ and transmittance of above 82 % at a range of 500-550 nm wavelength were obtained. In addition, structural and surface properties of IAI stacked films were analyzed by XRD (X-ray diffraction) and SEM (scanning electron microscopy), respectively. Moreover, IAI stacked films showed dramatically improved mechanical properties when subjected to bending both as a function of number of cycles to a fixed radius. Finally, OLEDs fabricated on both flexible IAI stacked anode and conventional ITO/Glass were fabricated and, J-V-L characteristics of those OLEDs were compared by Keithley 2400.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.209-209
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• 2007

Passive Device는 RF Circuit을 제작할 때 많은 면적을 차지하고 있으며 이를 감소시키기 위해 여러 연구가 진행되고 있다. 최근 SoP-L 공정을 이용한 많은 연구가 진행되고 있는데 PCB 제작에 이용되는 일반적인 재료와 공정을 그대로 이용함으로써 개발 비용과 시간 면에서 많은 장점을 가지기 때문이다. SoP-L의 또 하나 장점은 다층구조를 만들기가 용이하다는 점이다. 각 층 간에는 Via를 사용하여 연결하게 되는데, RF Circuit은 회로의 구조와 물성에 따라 특성이 결정되며, 그만큼 Via를 썼을 때 그 영향을 생각해야 한다. 본 연구에서는 multi-layer LCP substrate에 다수의 Via를 chain 구조로 형성하여 전기적 특성을 확인하였다. Via가 70um 두께의 substrate를 관통하면서 상층과 하층의 Conductor을 연속적으로 연결하게 된다. 이 구조의 Resistance와 Insertion Loss를 측정하여, Via의 크기 별 수율과 평균적인 Resistance, RF 계측기로 재현성을 확인하였다. 이를 바탕으로 공정에서의 안정성을 확보하고 Via의 크기와 도금방법에 의한 RF Circuit에서의 영향을 파악하여, 앞으로의 RF Device 개발에 도움이 될 것으로 기대한다. 특히 유기물을 이용한 다층구조의 고주파 RF Circuit에 Via를 적용할 때의 영향을 설계에서부터 고려할 수 있는 자료가 될 것이다.

• Journal of Advanced Navigation Technology
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• v.23 no.2
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• pp.172-178
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• 2019

This paper has designed, fabricated, and analyzed the passive devices realized using low temperature co-fired ceramic (LTCC) multi layer substrates by dividing into the shrinkage process and the non-shrinkage process. Using two types of ceramic materials with dielectric constant 7 or 40, we have fabricated the same shape of various elements in 2 different processes and compared the characteristics. For the substrate of dielctric constant 40, compared with the shrinkage process which has 17% shrink in the X and Y directions with 36% shrink in the Z direction, the non-shrinkage process has 43% shrink in the Z direction without shrink in the X and Y directions, so high dimensional accuracy and surface flatness can be obtained. The inductances and capacitances of the fabricated elements are estimated from measurement using empirical analysis equations of parameters and implemented as a design library. Depending on the substrate and the process, the inductance and capacitance depending on the turn number of winding and unit area have been measured, and empirical polynomials are proposed to predict element values.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.4
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• pp.137-141
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• 2004

In this paper, a thermopneumatic PMDS (polydimethlysiloxane) micropump with nozzle/diffuser elements is presented. The micropump is composed of nozzle/diffuser elements as dynamic valves, an actuator consisting of a circular PDMS diaphragm and a Cr/Au heater on a glass substrate. Four PDMS layers are used for fabrication of an actuator chamber, actuator diaphragm by a spin coating process, spacer layer, and nozzle/diffuser by the SU-8 molding process. The radius and thickness of the actuator diaphragm is 2 mm and 30 ${\mu}{\textrm}{m}$, respectively. The length and the conical angle of the nozzle/diffuser elements are 3.5 mm and 20$^{\circ}$, respectively. The actuator diaphragm is driven by the air cavity pressure variation caused by ohmic heating and natural cooling. The flow rate of the micropump in the frequency domain is measured for various duty cycles of the square wave input voltage. When the square wave input voltage of 5 V DC is applied to the heater, the maximum flow rate of the micropump is 44.6 ${mu}ell$/min at 100 Hz with a duty ratio of 80% under the zero pressure difference.

• Transactions on Electrical and Electronic Materials
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• v.9 no.4
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• pp.137-142
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• 2008

The parasitic resistance is studied to silicon/metal contact junction for improving device performance and to lower contact/serial resistance silicide in natural sequence. In this paper constructs the stepwise Ni silicide process for parasitic resistance reduction for silicon/metal contact junction. We have investigated multi-step Ni silicide on SiGe substrate with stepwise annealing method as an alternative to compose more thermally reliable Ni silicide layer. Stepwise annealing for silicide formation is exposed to heating environment with $5^{\circ}C/sec$ for 10 seconds and a dwelling for both 10 and 30 seconds, and ramping-up and the dwelling was repeated until the final annealing temperature of $700\;^{\circ}C$ is achieved. Finally a direct comparison for single step and stepwise annealing process is obtained for 20 nm nickel silicide through stepwise annealing is $5.64\;{\Omega}/square$ at $600\;^{\circ}C$, and it is 42 % lower than that of as nickel sputtered. The proposed stepwise annealing for Ni silicidation can provide the least amount of NiSi at the interface of nickel silicide and silicon, and it provides lower resistance, higher thermal-stability, and superior morphology than other thermal treatment.

• Korean Journal of Optics and Photonics
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• v.13 no.3
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• pp.209-214
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• 2002

The effect of surface roughness on mirror scattering has been studied. Five kinds of substrates with different surface roughness were fabricated. On those substrates, a dielectric multi-layer coating with high reflectivity was deposited by ion beam sputtering and electron beam evaporation. A total integrated scattering measurement set-up was built for the evaluation of deposited samples. Most of the ion beam sputtered mirrors showed lower scattering than the electron beam evaporated one, which deposited on substrates similar in surface roughness. Over ~2 $\AA$ in surface roughness, scattering strongly depend on the micro-structure of the super-polished surface. The lowest scattering we have achieved is 2.06 ppm by ion beam sputtering from the substrate with surface roughness of 0.23 $\AA$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.301-304
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• 2002

We investigated the structural and electrical properties of Ce-doped Ba($Zr_{0.2}Ti_{0.8}$)$O_3$(BCZT) thin films with a mole fraction of x=0.2 and a thickness about 100 nm. BCZT films were prepared on Pt/Ti/$SiO_2$/Si substrate by a RF magnetron sputtering system. We have measured the thickness profile with Ar/$O_2$ ratio and the surface roughness. It was observed that the oxygen gas, which introduced during the film deposition, have an influence on the roughness of the film and the film roughness was reduced by annealing from 2.33 nm to 2.02 m (RMS at $500^{\circ}C$, Ar:6 scrim, $O_2$:6 sccm). We have found that annealing procedure after top electrode deposit can reduce the dissipation factor.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.10
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• pp.183-190
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• 2003

Major device failures such as die cracking, interfacial delamination and warpage in flip chip packages are due to excessive heat and thermal gradients- There have been significant researches toward understanding the thermal performance of electronic packages, but the majority of these studies do not take into account the combined effects of thermo-mechanical interactions of the different package constituents. This paper investigates the thermo-mechanical performance of flip chip package constituents based on the finite element method with thermo-mechanically coupled elements. Delaminations with different lengths between the silicon die and underfill resin interfaces were introduced to simulate the defects induced during the assembly processes. The temperature gradient fields and the corresponding stress distributions were analyzed and the results were compared with isothermal case. Parametric studies have been conducted with varying thermal conductivities of the package components, substrate board configurations. Compared with the uniform temperature distribution model, the model considering the temperature gradients provided more accurate stress profiles in the solder interconnections and underfill fillet. The packages with prescribed delaminations resulted in significant changes in stress in the solder. From the parametric study, the coefficients of thermal expansion and the package configurations played significant roles in determining the stress level over the entire package, although they showed little influence on stresses profile within the individual components. These observations have been implemented to the multi-board layer chip scale packages (CSP), and its results are discussed.

• Carbon letters
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• v.14 no.3
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• pp.186-189
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• 2013

We report a highly sensitive $NO_2$ gas sensor based on multi-layer graphene (MLG) films synthesized by a chemical vapor deposition method on a microheater-embedded flexible substrate. The MLG could detect low-concentration $NO_2$ even at sub-ppm (<200 ppb) levels. It also exhibited a high resistance change of ~6% when it was exposed to 1 ppm $NO_2$ gas at room temperature for 1 min. The exceptionally high sensitivity could be attributed to the large number of $NO_2$ molecule adsorption sites on the MLG due to its a large surface area and various defect-sites, and to the high mobility of carriers transferred between the MLG films and the adsorbed gas molecules. Although desorption of the $NO_2$ molecules was slow, it could be enhanced by an additional annealing process using an embedded Au microheater. The outstanding mechanical flexibility of the graphene film ensures the stable sensing response of the device under extreme bending stress. Our large-scale and easily reproducible MLG films can provide a proof-of-concept for future flexible $NO_2$ gas sensor devices.