• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.433-436
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• 2003

In this paper, the efficient motion estimation and compensation method for 3 dimensional wavelet transform is proposed. Recently, since the compression performance and scalable functionality are provided by wavelet transform, many researches have been carried out for applying to the video compression. For the temporal filtering, motion estimation and compensation techniques are used, but the unconnected pixels, which are produced by motion compensation result into the degradation of coding performance and quality of the picture. For the efficient motion compensated temporal filtering by reducing the number of these unconnected pixels, we propose the variable block size motion estimation and compensation method. Also we propose a method that determines the block size using rate-distortion optimization technique according to the local characteristics of the frame. The simulation results show the improved performances than the MPEG-4 scalable coding methods and the 3 dimensional wavelet coding methods using fixed block size motion estimation and compensation.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.417-420
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• 2003

Most Embedded Web Camera Server products currently deployed on the market adopt JPEG for compression of video data continuously acquired from the cameras. However, JPEG does not efficiently compress the continuous video stream, and is not appropriate for the Internet where the transmission bandwidth is not guaranteed. In our previous work, we presented the result of designing and implementing an embedded web camera streaming server using MPEG4 codec. But the server in our previous work did not show good performance since one CPU had to both compress and process the network transmission. In this paper, we present our efforts to improve our previous result by using dual CPUs, where DSP is employed for data compression and StrongARM is used for network processing. Better performance has been observed, but it is found that still more time is needed to optimize the performance.

• ETRI Journal
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• v.29 no.4
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• pp.539-541
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• 2007

As the number of digital content service providers increases, a variety of digital rights management (DRM) systems appear without supporting interoperability. The lack of interoperability in DRM systems causes inconvenience to customers, especially when they want to play content through multiple devices manufactured by different vendors. In this letter, we propose a novel method to support interoperability between different DRM systems. The proposed technique aims to build an open framework structure which satisfies DRM vendors' requirements by enhancing the security of intellectual property management and the protection tools.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2008.02a
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• pp.159-162
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• 2008

이 연구는 Ka대역 위성방송 서비스를 제공할 때 발생하는 강우감쇠문제를 해결하기 위하여 MPEG-4 SVC 신호를 이용하는 방안에 대하여 고찰하였다. Ka대역 위성방송시스템은 DVB-S2 VCM 모드를 고려하였으며, JSCC (Joint Source Channel Coding) 기법을 이용하여, SVC신호를 Ka대역 위성방송시스템에 적용하였다. SVC신호는 Spatial Scalability, SNR Scalability 및 Temporal Scalability로 구분되어서, PSNR값의 변화에 따른 비트율 변화정도를 분석하였다. 비트율 변화율이 가장 큰 Spatial Scalability를 적용한 SVC신호가 Ka대역 위성방송서비스의 강우감쇠 문제를 해결하기 위한 방안으로 제안되었으며, 이에 대한 분석이 수행되었다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2008.02a
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• pp.163-166
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• 2008

이 논문에서는 MPEG-4 SVC 신호를 DVB-S2 전송시스템에 적용하여 Ka대역 위성방송서비스를 제공하는 전송방안에 대한 연구를 하였다. SVC신호는 계층 수를 2개로 제한하였으며, 이러한 다계층 신호를 DVB-S2 전송시스템에 적용하기 위하여, 성상도상에서 각 계층의 신호를 동기적으로 합치는 Hierarchical 변조방식과 각 계층의 전송스트림을 RF 주파수 상에서 비동기적으로 합치는 방식인 Layered 변조방식을 사용하였다. 각 전송방안에서 변조방식과 채널 부호율을 결합 소스/채널 부호화 방안에 따라 변화시켜 최적의 전송기법을 도출하였다.

• Proceedings of the Acoustical Society of Korea Conference
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• 1998.08a
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• pp.165-168
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• 1998

제안하고 있는 CSD17C00 chip은 C&S technology에서 개발한 것으로, 음성 신호 처리를 위해 범용으로 구현되었으며, 16 bit 40 MIPS DSP group OAK DSP Core를 포함, 이에 Miscellaneous Logic, Serial Port, Host Interface, Timer, Compander 의 5가지 Peripherals 과 범용 I/O Ports 로 설계되었다. 1차적으로 CSD17C00 Chip 의 성능을 점검하였다. 그 결과, 응용 프로그램은 28MIPS의 계산속도를 갖으며, 프로그램 ROM 크기는 8.85KWords 이고, 10KWords 의 데이터 ROM 과 4KWords 데이터 RAM을 필요로 한다. CSD17C00 CHIP은 멀티미디어 통신용 VOCODER 개발을 위한 범용성을 갖추고 있으며, VOCODER 용 S/W 개발 환경 및 H/W 구조가 여타 범용 DSP에 비해편의성고 K합리성을 제공하도록 설계되어 있다. 따라서, 이를 이용한다면, 멀티 미디어 통신용 VOCODER, INTERNET PHONE CO-PROCESSOR, DIGITAL RECODER, MPEG AUDIO ENCODER & DECODER 등 다양한 제품으로의 응용이 가능할 것으로 전망된다.

• The Journal of the Acoustical Society of Korea
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• v.25 no.4E
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• pp.137-141
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• 2006

This paper presents HE-AAC decoder optimization on TMS320C55x fixed-point DSP core using a DSP-C like FFR code, which provides fast and flexible porting to a DSP core. Our optimization efforts are focused on methodologies that include general optimization methods of FFR code suitable for general DSP or RISC platform in high-level language and software optimization methods in assembly language level. The implementation result requires 48 MIPS and 135 Kbytes memory space to decode 48 Kbps stereo using real Korean S-DMB data.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.601-604
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• 1999

We propose a new hierarchical motion estimator architecture that supports the advanced prediction mode of recent low bit-rate video coders such as H.263 and MPEG-4. In the proposed VLSI architecture, a basic searching unit (BSU) is commonly utilized for all hierarchical levels to make a systematic and small sized motion estimator. Since the memory bank of the proposed architecture provides scheduled data flow for calculating 8$\times$8 block-based sum of absolute difference (SAD), both a macroblock-based motion vector (MV) and four block-based MVs are simultaneously obtained for each macroblock in the advanced prediction mode. The proposed motion estimator gives similar coding performance compared with full search block matching algorithm (FSBMA) while achieving small size and satisfying the advanced prediction mode.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.1117-1120
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• 1999

The main purpose of padding methods is to extend the boundary segments of arbitrarily shaped objects to a regular grid so that the common block based coding technique, such as 8${\times}$8 DCT, can be applied. In the conventional padding methods used in MPEG-4: LPE and zero padding, the main process is based on 8${\times}$8 blocks. On the contrary, we propose a new padding method based on pixel-by-pixel. The proposed method puts pixels into a multi-busier using the typical value of each boundary blocks and reproduces new boundary blocks. Simulation results show that the proposed method reduces the conventional padding method and improves the coding efficiency of the conventional padding method.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.12
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• pp.1581-1590
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• 1995

Recently, advanced video coding techniques using segmentation technique have been actively researched as candidates for video coding of MPEG-4 standard. The conventional segmentation techniques are unsuitable for real-time process because they have sequential structure. In this paper, we propose a new image segmentation technique using competitive learning neural network for vector quantization. The proposed segmentation procedure consist of prefiltering, primary and secondary segmentation, and a small region ellimination process. Primary segmentation segments input image in detail. Secondary segmentation merges similar region using a repetitive FSCL(Frequency sensitive competive learning) neural network. In this process, it is possible to segment an image from high resolution to low resolution by adjusting the number of repetition. Finally, small regions are merged into adjacent regions. Experimental results show that the procedure described yields reconstructed images of reasonably acceptable quality at bit rates of 0. 25 - 0.3 bit/pel.