• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.11
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• pp.71-78
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• 1995

Based on the popular 4-transistor SRAM cell, an analytical expression of the minimum cell ratio was derived by modeling the static read operation. By analyzing the relatively simple expression for the minimum cell ratio, which was derived assuming the ideal transistor characteristics, effects of the changes in supply voltage and process parameters on the minimum cell ratio was predicted, and the minimum power supply voltage for read operation was determined. The results were verified by simulations utilizing the suggested simulation method, which is suitable for monitoring the lower limit of supply voltage for proper cell operation. From the analysis, it was shown that the worst condition for cell operation is low temperature and low supply voltage, and that the operation margin can be effectively improved by reducing the threshold voltage of the cell transistors.

• Journal of Power Electronics
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• v.7 no.1
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• pp.72-80
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• 2007

Voltage sags are one of the most frequently occurring power quality problems challenging power systems today. The Unified Power Quality Conditioner (UPQC) is one of the major custom power solutions that are capable of mitigating the effect of supply voltage sags at the load or Point of Common Coupling (PCC). A UPQC-Q employs a control method in which the series compensator injects a voltage that leads the supply current by $90^{\circ}C$ so that the series compensator at steady state consumes no active power. However, the UPQC-Q has the disadvantage that its series compensator needs to be overrated. Thus it cannot offer effective compensation. This paper proposes a new control scheme for the UPQC-Q that offers minimum power injection. The proposed minimum power injection method takes into consideration the limits on the rated voltage capacity of the series compensator and its control scheme. The validity of the proposed control scheme is investigated through simulation and experimental results.

• Journal of Power Electronics
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• v.14 no.5
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• pp.908-917
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• 2014

For the purpose of designing an intrinsic safety Flyback converter with minimal output voltage ripple based on a specified output current, this paper first classified the energy transmission modes of the system into three sorts, namely, the Complete Inductor Supply Mode-CCM (CISM-CCM), the Incomplete Inductor Supply Mode-CCM (IISM-CCM) and the Incomplete Inductor Supply Mode-DCM (IISM-DCM). Then, the critical secondary self-inductance assorting the three modes are deduced and expressions of the output voltage ripples (OVR) are presented. For a Flyback converter with constant loads and switching frequency, it is shown that the output voltage ripple in the CISM-CCM is the smallest and that it has no relationship with the secondary self-inductance. Otherwise, the OVR of the other two modes are bigger than the previously mentioned one. It is concluded that the critical inductance between the CISM-CCM and the IISM-CCM is the minimal secondary self-inductance to ensure the smallest output voltage ripple. At last, a design method to guarantee the minimum OVR within the scales of the input voltage and load are analyzed, and the minimum secondary self-inductance is proposed to minimize the OVR. Simulations and experiments are given to verify the results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.785-788
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• 2007

The newly proposed badgap reference voltage generator is insensible to PVT(process, voltage, temperature) variation and has a lower minimum supply voltage, which is required for stable operation. The simulation result is that the bandgap reference voltage generator starts operation at 1.0V of supply voltage. The layout of the bandgap reference voltage generator is designed using Magnachip $0.18{\mu}m$ DDI process, and the size is $409.36{\mu}m$ ${\times}$ $435.46{\mu}m$.

• Journal of Advanced Information Technology and Convergence
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• v.8 no.2
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• pp.59-67
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• 2018

The minimum power supply voltage of a typical bandgap current reference (BGCR) is limited by operating temperature and input common mode range (ICMR) of a feedback amplifier. A new BGCR using a bandgap voltage generator (BGVG) is proposed to minimize the effect of temperature, supply voltage, and process variation. The BGVG is designed with proportional to absolute temperature (PTAT) characteristic, and a feedback amplifier is designed with weak-inversion transistors for low voltage operation. It is verified with a $0.18-{\mu}m$ CMOS process with five corners for MOS transistors and three corners for BJTs. The proposed circuit is superior to other reported current references under temperature variation from $-40^{\circ}C$ to $120^{\circ}C$ and power supply variation from 1.2 V to 1.8 V. The total power consumption is $126{\mu}W$ under the conditions that the power supply voltage is 1.2 V, the output current is $10{\mu}A$, and the operating temperature is $20^{\circ}C$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.184-188
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• 2014

There is a trade-off between read stability and writability under a full-/half-select condition in static random access memory (SRAM). Another trade-off in the minimum operating voltage between the read and write operation also exists. A new peripheral circuit for SRAM arrays, called a variation sensor, is demonstrated here to balance the read/write margins (i.e., to optimize the read/write trade-off) as well as to lower the minimum operation voltage for both read and write operations. A test chip is fabricated using an industrial 45-nm bulk complementary metal oxide semiconductor (CMOS) process to demonstrate the operation of the variation sensor. With the variation sensor, the word-line voltage is optimized to minimize the trade-off between read stability and writability ($V_{WL,OPT}=1.055V$) as well as to lower the minimum operating voltage for the read and write operations simultaneously ($V_{MIN,READ}=0.58V$, $V_{MIN,WRITE}=0.82V$ for supply voltage $(V_{DD})=1.1V$).

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.8
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• pp.551-556
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• 2000

A zero-voltage-switching(ZVS) programmable power supply employing the ZVS active clamp forward converter is suggested. Through the analysis on operation region of the supply, the constant power region and the maximum current limit region are clearly identified. Furthermore, the duty ratio range corresponding to the variation range of the output voltages and the control scheme at the minimum duty ration region are presented. Finally, in order to vefity the validity of the operation for the proposed power supply, experimental evaluation results obtained on an 1kW prototype power supply for the 198~242VAC input voltage range(220VAC$\pm$10%), the 0~25V output voltage range, and the 100kHz switching frequency are presented.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.3
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• pp.116-121
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• 2012

Recently, in the field of renewable energy such as solar cells including the semiconductor and display industries, thin film deposition process is being diversified. Furthermore, to deal with trend of making high-quality and fast, the high-capacity and output plasma power supply which can control high density plasma is required. The biggest problem is arc discharge caused by using high voltage power supply. Thus, the key function of plasma power supply is to prevent arc discharge and there is a need to maintain the possible minimum arc energy. In DC sputtering power supply, on a periodic basis (-)voltage powering up is able to significantly reduce arcing, as well as arc discharge prevention, and maintaining uniform charge density. This conventional method for powering up (-)voltage requires heavy mutual inductance of the transformer to avoid distortion problem of the output voltage. This study is about energy recovery circuit for arc discharge prevention in sputtering plasma power supply. By using energy recovery circuit, it is possible to reduce the mutual inductance and size of the transformer dramatically, prevent distortion of the output voltage and has a stable output waveform. This work was proved through simulation and experimental study.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.12
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• pp.1021-1026
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• 2002

As the development of semiconductor process technology continue to advance, ICs continue their trend toward higher performance low power system-on-chip (SOC). These circuits require on board multi power supply. In this paper, a 0.5 ㎛ dual date oxide CMOS Process technology for multi-power application is demonstrated. 5 V and 20 V devices fabricated by proposed process is measured. From 5 V devices using dual gate precess, we got almost the same characteristics as are obtained from standard 5 V devices. And the characteristics of the 20 V device demonstrates that 3 ㎛ devices with minimum gate length are available without reliability degradation. Electrical parameters in minimum 3 ㎛ devices are 520 ㎂/㎛ current density, 120 ㎷ DIBL, 24 V BV for NMOS and ,350 ㎂/㎛ current density, 180 ㎷ DIBL, 26 V BV for PMOS, respectively.

• Proceedings of the KSR Conference
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• 2003.05a
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• pp.548-553
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• 2003

Battery supplies Each Electric device in Railway vehicles with Control Power. When Battery is overchargedjustly, the battery voltage is not satisfied with the minimum operating voltage, CVCF Inverter(SIV) is supplied with external Power supply or the other railway vehicles and start up CVCF Inverter. In this paper to improve this problem, Dead battery Starter system is proposed. When the battery voltage is not satisfied with the minimum value.turn on the Dead Battery Starter switch, and the Dead Battery Starter supplies the control power to the SIV controller from the line voltage. With this Dead Battery Starter system, the train can be operated when the battery is not proper status. Dead Battery Starter is designed by ROTEM and will be delivered to Attiko Metro Series 2.