• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.1
• /
• pp.65-70
• /
• 2008

RSA crypto-processors equipped with more than 1024 bits of key space handle the entire key stream in units of blocks. The RSA processor which will be the target design in this paper defines the length of the basic word as 128 bits, and uses an 256-bits register as the accumulator. For efficient execution of 128-bit multiplication, 32b${\times}$32b multiplier was designed and adopted and the results are stored in 8 separate 128-bit registers according to the status flag. In this paper, an efficient method to execute 128-bit MAC (multiplication and accumulation) operation is proposed. The suggested method pre-analyze the all possible cases so that the MAC unit can remove unnecessary calculations to speed up the execution. The proposed architecture prototype of the MAC unit was automatically synthesized, and successfully operated at 20MHz, which will be the operation frequency in the target RSA processor.

• Journal of the Korean Society for Precision Engineering
• /
• v.13 no.9
• /
• pp.114-129
• /
• 1996

This paper describes the whole development phase for the underwater vehicle actuating system with high hydroload torque disturbance. This includes requirement analysis, system modeling, control algorithm design, real time implementation, test and performance evaluations. As for driving control algorithms, fuzzy logic, variable structure and PD(Proportional-Differential) algorithm were designed and implemented on board controller using a single chip microprocessor. Intel 8797. And test and performance evaluation is carried out both single test and wystem integration test. We could confirm the basic performance of actuating system through the single test and gereral developing work of any actuating systems was finished with a single performance test of actuating system without system integration test. But, we suggested that system integration test be needed. System integration test is carried out using G/C HILS(Guidance and Control Hardware-In-the -Loop Simulation) which is constituted flight motion simulator, load simulator, real time host computer and the related subsystems such as inertial navigation system, power supply system and Guidance and Control Computer etc.. The most important practical contribution of this paper is that full system characteristics such as minimal control effort, enhancement of guidance and autopilot performance by the actuating system using G/C HILS technique are investigated. Through full running G/C HILS, in spite of the passing to single tests, some control algorithm resulted in failure as to stability of full system and system time frame.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.7 no.3
• /
• pp.27-33
• /
• 1993

This paper presents the &tal controller for driving high frequency voltage fed PWM inverter that carrier frequency is over 2OkHz.We analyzed the conventional PWM to select a proper PWM pattern. as the result, obtained PWM pattern of the controller in which asynchronus staircase sinusoidal waveform is used as reference signal, and variable carrier ratio method was used for PWM control. The PWM controller is designed by fully digital method. Especially, Thk proposed controller is consisted of 8 bit one-chip microprocessor and digital logic. the former is for arithmetic and data processing, and the latter is for PWM pattern synthesis. Therefore, The responsibility and controllability is improved. Also, Data processing capability is improved using proper program to output modulation index with 9 bits. Circuits configuration of digital controller are made up of one chip 8051 and EPLD, and its controllability is tested by operating voltage fed inverter. Harmonics and current waveform is evaluated and analyzed for the voltage fed inverter system.

• Journal of the Korea Society of Computer and Information
• /
• v.18 no.9
• /
• pp.11-19
• /
• 2013

Most modern computer systems employ cache systems in order to alleviate the access time gap between processor and memory system. The power dissipated by the cache systems becomes a significant part of the total power dissipated by whole microprocessor chip. Therefore, power reduction in the cache system becomes one of the important issues. Partial tag cache is the system for the least power consumption. The main power reduction for this method is due to the use of small partial tag matching, not full tag matching. In this paper, we first analyze the previous regular partial tag cache systems and propose a new address matching mechanism by using locality buffer and address compression. In simulation results, the proposed model shows 18% power reduction in average, still providing same performance level, compared to regular cache.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.1
• /
• pp.68-75
• /
• 2009

As the recent performance of microprocessor is improving quickly, the necessity of cache is growing because of the increase of the access time of main memory. Every block of direct-mapped cache maps to one cache line. Although the mapping rule is simple, if different blocks map to one cache line, the miss ratio will be higher than the set-associative cache due to conflicts. In this paper, for the improvement of the direct-mapped cache of OpenRISC, 4-way set-associative cache is proposed. Four blocks of the main memory of the proposed cache map to one cache line so that the miss ratio is less than the direct-mapped cache. Pseudo-LRU Policy, which is one of the Line Replacement Policies, is used for decreasing the number of bits that store LRU value. The OpenRISC core including the 4-way set-associative cache was verified with FPGA emulation. As the result of performance measurement using test program, the performance of the OpenRISC core including the 4-way set-associative cache is higher than the previous one by 50% and the decrease of miss ratio is more than 15%.

• Journal of the Korea Society of Computer and Information
• /
• v.6 no.2
• /
• pp.8-13
• /
• 2001

We demonstrate a pulsed CO$_2$laser with long pulse duration of millisecond order in the low pressure less than 30 Torr. A new power supply for our laser system switches the voltage of AC power line(60㎐) directly. The power supply doesn't need elements such as a rectified bridge, energy-storage capacitors. and a current-limiting resistor in the discharge circuit. In order to control the laser output power, the pulse repetition rate is adjusted up to 60㎐ and the firing angle of SCR gate is varied from 30˚ to 150˚. A ZCS(Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control the gate signal of SCR precisely. The maximum laser output is 23W at the total pressure of 18 Torr, the pulse repetition rate of 60㎐, and SCR gate firing angle of 90˚. In addition, the obtained laser pulse width is approximately 3㎳(FWHM)

• The Journal of the Korea institute of electronic communication sciences
• /
• v.10 no.8
• /
• pp.921-926
• /
• 2015

For the over-heat protection purpose in power strip devices, over-current detection/protection circuits, such as bimetal, switching circuit, and microprocessor-based relay circuit, have been widely setup in high-end products. Most of these circuits are connected to the power line in parallel and, thus, they are sensitive to the line voltage and current distortion. Moreover, these protection circuits are often costly and, therefore, it is hard to meet the commercial requirements. A low-cost over-current detection circuit with the contactless current transducer is designed and tested in this paper. The detection circuit is galvanically isolated from the power line and, thus, less sensitive to the line voltage distortion. The experimental results show that the proposed circuit accurately operates despite of its simple structure and low-cost electronic parts.

• Journal of the Korea Computer Industry Society
• /
• v.2 no.8
• /
• pp.1055-1062
• /
• 2001

Study, it is the purpose to develope a cheap and compact pulsed $CO_2$ laser with pulse repetition rate range of 1 KHz. We used a IGBT switched power supply as a power supply, which is cheap and simple comparing to others. PIC one-chip microprocessor was used for precise control of a laser power supply on the control part. And the laser cavity was fabricated as an axial and water cooled type. The laser performance characteristics as various parameters, such as pulse repetition rate, gas pressure, and gas mixture rate have been investigated. The experiment was done under the condition of total pressure of $CO_2$： $N_2$：He ＝ 1：3：10, 1：1.5：5, 1：9：15 from 6 Torr to 15 Torr and pulse repetition rate from 100 Hz to 900 Hz. As a result, the maximum average outpu was about 20.5 W at the total pressure of 15 Torr, the gas mixture $CO_2$：$N_2$：He ＝ 1：9：15 and the pulse repetition rate of 700 Hz.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.7 no.6
• /
• pp.27-33
• /
• 1993

In order to improve complicated construction and complex control which are didvantage of optimal PWM technique aimed at harmonic elimination method, this paper presented MRA(Mode1 Reference Adaptive) PWM technique that gating signal of inverter is generated by comparing the reference signal with the induced feedback signal at the reference model of load. Design of controller is composed of microprocessor and analog circuit. MRA PWM technique used in the paper is able to compensate the degradation of voltage efficiency to be generated by the ratio of the output voltage to the DC supply voltage being low for using conventional sinusoidal PWM technique. When the trapezoidal signal is employed as the reference signal. the low order harmonics of line current can be reduced and the switching pattern is made by on-line computation using comparatively simple numerical analysis.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.7 no.2
• /
• pp.36-40
• /
• 1993

In order to improve complicated construction and complex control which are disadvantage of optimal PWM technique aimed at harmonic elimination method, this paper presented MRA(Model Reference Adaptive) PWM technique that gatmg signal of inverter is generated by comparing the reference signal with the induced feedback signal at the reference model of load. Design of controller is composed of microprocessor and analog circuit. MRA PWM technique used in the paper is able to compensate the degradation of voltage efficiency to be generated by the ratio of the output voltage to the DC supply voltage being low for using conventional sinusoidal PWM technique. When the trapezoidal signal is employed as the reference signal. the low order harmonics of line current can be reduced and the switching pattern is made by on-line computation using comparatively simple numerical analysis.