• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.107-112
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• 2005

We present an AlGaN/GaN metal-insulator-semiconductor-heterostructure field effect transistor (MIS-HFET) with an $Al_2O_3-HfO_2$ laminated high-k dielectric, deposited by plasma enhanced atomic layer deposition (PEALD). Based on capacitance-voltage measurements, the dielectric constant of the deposited $Al_2O_3-HfO_2$ laminated layer was estimated to be as high as 15. The fabricated MIS-HFET with a gate length of 102 m exhibited a maximum drain current of 500 mA/mm and maximum tr-ansconductance of 125 mS/mm. The gate leakage current was at least 4 orders of magnitude lower than that of the reference HFET. The pulsed current-voltage curve revealed that the $Al_2O_3-HfO_2$ laminated dielectric effectively passivated the surface of the device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.511-515
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• 2013

A Monte Carlo (MC) simulation study has been done in order to investigate the effects of line-edge-roughness (LER) induced by either 1P1E (single-patterning and single-etching) or 2P2E (double-patterning and double-etching) on fully-depleted silicon-on-insulator (FDSOI) tri-gate metal-oxide-semiconductor field-effect transistors (MOSFETs). Three parameters for characterizing the LER profile [i.e., root-mean square deviation (${\sigma}$), correlation length (${\zeta}$), and fractal dimension (D)] are extracted from the image-processed scanning electron microscopy (SEM) image for each photolithography method. It is experimentally verified that two parameters (i.e., ${\sigma}$ and D) are almost the same in each case, but the correlation length in the 2P2E case is longer than that in the 1P1E case. The 2P2E-LER-induced $V_TH$ variation in FDSOI tri-gate MOSFETs is smaller than the 1P1E-LER-induced $V_TH$ variation. The total random variation in $V_TH$, however, is very dependent on the other major random variation sources, such as random dopant fluctuation (RDF) and work-function variation (WFV).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.05a
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• pp.152-155
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• 2006

Carbon nitride ($CN_X$) films were prepared by reactive RF magnetron sputtering system at various deposition conditions and the C-V characteristics of MIS(metal - insulator - semiconductor) capacitors that have the structures of Al/$CN_x$/p-Si/Al and Al/$CN_x$/$Si_3N_4$/p-Si/Al were investigated. The resistivity of carbon nitride was above $2.40{\times}10^8{\Omega}{\cdot}cm$ at room temperature. The C-V plot showed a typical capacitance-voltage characteristics of semiconductor insulating layers, while it showed hysterisis due to interface charges. Amorphous carbon nitride (a-$CN_x$) films, that have relatively high resistivity and low dielectric constant could be useful as interlayer insulator materials of VLSI(very large-scale integration) and ULSI(ultra large-scale integration).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.29-32
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• 1999

$GaF_3$ films were directly grown on p' and p-type GaAs(100) substrates using a $SF_6$ plasma discharge system. GaAs MIS(Meta1-Insulator-Semiconductor) capacitor was successfully fabricated for about 1 hour at temperature $290^{\circ}C$ using the as-grown $GaF_3$ films. The as-grown films on p'-GaAs exhibited a current density of less than 6.68 $\times$ $1O^{-9}$ A/$cm^2$ at a breakdown field of 500kV/cm and a refractive index of 2.0 ~ 2.3 at a wavelength of 632.8 nm. The dielectric constant was about 5 derived from 1 MHz capacitance-voltage (C-V) measurements. Dielectric dispersion of the fluoridated films on p'-GaAs measured ranged from 100 Hz to 10 MHz was not observed.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.9-11
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• 2000

To increase the device linearities and the breakdown-voltages of FETs, Al$\sub$0.25/ Ga$\sub$0.75/AS / In$\sub$0.25/Ga$\sub$0.75/As / Partially doped channel FET(DCFET) structures are proposed. The metal- insulator -semiconductor (MIS) like structures show the high gate-drain breakdown voltage(-20 V) and high linearities. The devices showed the small ripple of the current cut-off frequency and the power cut-off frequency over the wide bias range.

• Proceedings of the Korean Vacuum Society Conference
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• 2009.08a
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• pp.221-221
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• 2009

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1085-1088
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• 2003

In this work, we fabricated a gas-sensing device based on porous silicon(PS), and its I-V and C-V properties were investigated for sensing alcohol vapor. The structure of the sensor consists of thin Au/Oxidized porous silicon/porous silicon/Silicon/Al, where the silicon substrate is etched anisotropically to be prepared into a membrane shape. As the result, I-V curves showed typical tunneling property, and C-V curves were shaped like those of a MIS (metal-insulator- semiconductor) capacitor, where the capacitance in accumulation was increased with alcohol vapor concentration.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.1
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• pp.1-11
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• 2004

A FinFET, a novel double-gate device structure is capable of scaling well into the nanoelectronics regime. High-performance CMOS FinFETs , fully depleted silicon-on-insulator (FDSOI) devices have been demonstrated down to 15 nm gate length and are relatively simple to fabricate, which can be scaled to gate length below 10 nm. In this paper, some of the key elements of these technologies are described including sub-lithographic pattering technology, raised source/drain for low series resistance, gate work-function engineering for threshold voltage adjustment as well as metal gate technology, channel roughness on carrier mobility, crystal orientation effect, reliability issues, process variation effects, and device scaling limit.

• Vacuum Magazine
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• v.5 no.2
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• pp.10-17
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• 2018

Chalcogenide and oxide heterostructures have been studied as a next-generation electronic materials, due to their interesting electronic properties, such as direct bandgap semiconductor, ferroelectricity, ferromagnetism, superconductivity, charge-density waves, and metal-insulator transition, and their modification near heterointerfaces, so called, electronic reconstruction. An angle-resolved photoemission spectroscopy (ARPES) is a powerful technique to unveil such novel electronic phases in detail, especially combined with high quality thin film preparation methods, such as, molecular beam epitaxy and pulsed laser deposition. In this article, the recent ARPES results in chalcogenide and oxide thin films will be introduced.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.11
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• pp.698-703
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• 2015

In this study, we fabricated the dual gate (DG) ion-sensitive field-effect-transistor (ISFET) with flexible polyimide (PI) extended gate (EG). The DG ISFETs significantly enhanced the sensitivity of pH in electrolytes from 60 mV/pH to 1152.17 mV/pH and effectively improved the drift and hysteresis phenomenon. This is attributed to the capacitive coupling effect between top gate and bottom gate insulators of the channel in silicon-on-transistor (SOI) metal-oxide-semiconductor (MOS) FETs. Accordingly, it is expected that the PI-EG based DG-ISFETs is promising technology for high-performance flexible biosensor applications.