• Journal of the Optical Society of Korea
• /
• v.20 no.2
• /
• pp.291-299
• /
• 2016

We have investigated the ultimate limits of nonuniform grating couplers (NGCs) for optimized fiber coupling to silicon waveguides, compared to uniform grating couplers (UGCs). Simple grating coupler schemes, which can be fabricated in etching steps of the conventional complementary metal-oxide semiconductor (CMOS) process on silicon-on-insulator (SOI) wafers without forming any additional overlay structure, have been simulated numerically and demonstrated experimentally. Optimum values of the grating period, fill factor, and groove number for ultimate coupling efficiency of the NGCs are determined from finite-difference time-domain (FDTD) simulation, and confirmed with experimentally demonstrated devices by comparison to those for the UGCs. Our simulated results indicate that maximum coupling efficiency of NGCs is possible when the minimum pattern size is below 50 nm, but the experimental value for the maximum coupling efficiency is limited by the attainable fabrication tolerance in a practical device process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.21 no.8
• /
• pp.711-714
• /
• 2008

Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.

• Journal of Magnetics
• /
• v.6 no.1
• /
• pp.1-4
• /
• 2001

We have used acetic acids ethanol and distilled water as a solvent to synthesize $La_{2/3}Sr_{1/3}Mn_{0.99}{^{57}}Fe_{0.01}O_3$(LSMFO) precursor. Crack-free LSMFO granular polycrystalline thin films have been deposited on thermally oxidized silicon substrates by spin coaling. The dependence of crystallization, surface morphology, magnetic and transport properties on annealing temperature was investigated. With increasing annealing temperature, the metal-semiconductor (insulator) transition temperature and the magnetic moment decrease while the resistivity increases. The lattice constants remain almost unchanged. For LSMFO thin films, spin-dependent interfacial tunneling and/or scattering magnetoresistance were observed. Our results indicate that the annealing temperature is very important in determining the intrinsic and extrinsic magnetotransport properties.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.10
• /
• pp.865-870
• /
• 2003

The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• 정보저장시스템학회:학술대회논문집
• /
• 2005.10a
• /
• pp.56-58
• /
• 2005

To illustrate an application of the field effect transistor (FET) structure, this study suggests a new cantilever, using atomic force microscopy (AFM), for sensing surface potentials in nanoscale. A combination of the micro-electromechanical system technique for surface and bulk and the complementary metal oxide semiconductor process has been employed to fabricate the cantilever with a silicon-on-insulator (SOI) wafer. After the implantation of a high-ion dose, thermal annealing was used to control the channel length between the source and the drain. The basic principle of this cantilever is similar to the FET without a gate electrode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.29 no.12
• /
• pp.809-813
• /
• 2016

We investigated a SiC-based hydrogen gas sensor with MIS (metal-insulator-semiconductor) structure for high temperature applications. The sensor was fabricated by $Pd/TiO_2/SiC$ structure, and a thin titanium dioxide ($TiO_2$) layer was exploited for sensitivity improvement. In the experiment, dependences of I-V characteristics and capacitance response properties on hydrogen gas concentrations from 0 to 2,000 ppm were analyzed at room temperature to $400^{\circ}C$. As the result, our sensor using $TiO_2$ dielectric layer showed possibilities with regard to use in hydrogen gas sensors for high-temperature applications.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.29A no.3
• /
• pp.87-95
• /
• 1992

The electrical characteristics of Al/TaS12TOS15T/SiOS12T/Si metal insulator-semiconductor (MIS) capacitors were studied. Tantalum pentoxide thin films on SiOS12T/p-Si substrate have been prepared by thermal oxidation at 450-$600^{\circ}C$ of sputter deposited tantalum films. Composition and structures of the tantalum oxide films were examined by AES and XRD. From the C-V analysis, dielectric constant of TaS12TOS15T which were oxidized at 55$0^{\circ}C$ for 1h in OS12T were 18-23, the value depending on the oxidation and annealing temperature. The leakage current density was found to be about 10S0-10T-10S0-9T A/cmS02T at an applied electric field of 1 MV/cm. The dielectric breakdown strength of the tantalum oxide films annealed at 100$0^{\circ}C$ were in the range from 2.5MV/cm to 2.8 MV/cm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1999.11a
• /
• pp.433-436
• /
• 1999

In this paper we applied TVS(Triangular Voltage Sweep) method to calculate the mobile ionic charge densities in some ferroelectric thin films. During the measurement, the temperature of specimens were maintained at 20$0^{\circ}C$. By this method, the amount of mobile ionic charge Q$_{m}$ and mobile ionic charge density N$_{m}$ of a MFIS structure were calculated 3.5 [pC] and about 4.3$\times$10$^{11}$ [ions/cm$^2$], respectively. In order to successful TVS measurement, the gate leakage current density of films must be low 10$^{-9}$ (A/cm$^2$) order.der.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.11a
• /
• pp.84-87
• /
• 2003

Carbon nitride ($CN_x$) films were prepared by reactive RF magnetron sputtering system with DC bias at various deposition conditions and the electrical properties were investigated. The films were characterized by fourier transform infrared (FTIR) spectroscopy, and X-ray photoelectron spectroscopy (XPS). The metal-insulator-semiconductor (MIS) capacitor which has $Al/CN_x/Si$ structure was designed and fabricated to investigate the capacitance-voltage (C-V) characteristics. Dielectric constant of carbon nitride films is very small.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2005.07a
• /
• pp.21-22
• /
• 2005

Partially-depleted Silicon on insulator metal-oxide-semiconductor field- effect transistors (PD-SOI MOSFETs) with Silicon-germanium (SiGe) layer is investigated. This structure uses SiGe layer to reduce the kink effect in the floating body region near the bottom channel/buried oxide interface. Among many design parameters influencing the performance of the device, Ge composition is presented most predominant effects, simulation results show that kink effect is reduced with increase the Ge composition. Because the bandgap of SiGe layer is reduced at higher Ge composition, the hole current between body and SiGe layer is enhanced.