Park, Jun-Woong;Kim, Ik-Soo;Shim, Sun-Il;Youm, Min-Soo;Kim, Yong-Tae;Sung, Man-Young
Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
/
2003.07a
/
pp.319-322
/
2003
To match the charge induced by the insulators $CeO_2$ with the remanent polarization of ferro electric SBT thin films, areas of Pt/SBT/Pt (MFM) and those of $Pt/CeO_2/Si$ (MIS) capacitors were ind ependently designed. The area $S_M$ of MIS capacitors to the area $S_F$ of MFM capacitors were varied from 1 to 10, 15, and 20. Top electrode Pt and SBT layers were etched with for various area ratios of $S_M\;/\;S_F$. Bottom electrode Pt and $CeO_2$ layers were respectively deposited by do and rf sputtering in-situ process. SBT thin film were prepared by the metal orgnic decomposition (MOD) technique. $Pt(100nm)/SBT(350nm)/Pt(300nm)/CeO_2(40nm)/p-Si$ (MFMIS) gate structures have been fabricated with the various $S_M\;/\;S_F$ ratios using inductively coupled plasma reactive ion etching (ICP-RIE). The leakage current density of MFMIS gate structures were improved to $6.32{\times}10^{-7}\;A/cm^2$ at the applied gate voltage of 10 V. It is shown that in the memory window increase with the area ratio $S_M\;/\;S_F$ of the MFMIS structures and a larger memory window of 3 V can be obtained for a voltage sweep of ${\pm}9\;V$ for MFMIS structures with an area ratio $S_M\;/\;S_F\;=\;6$ than that of 0.9 V of MFS at the same applied voltage. The maximum memory windows of MFMIS structures were 2.28 V, 3.35 V, and 3.7 V with the are a ratios 1, 2, and 6 at the applied gate voltage of 11 V, respectively. It is concluded that ferroelectric gate capacitors of MFMIS are good candidates for nondestructive readout-nonvolatile memories.
Lee Kwang-Yong;Oh Teck-Su;Won Hye-Jin;Lee Jae-Ho;Oh Tae-Sung
Journal of the Microelectronics and Packaging Society
/
v.12
no.2
s.35
/
pp.111-119
/
2005
Stack specimen with three dimensional interconnection structure through Cu via of $75{\mu}m$ diameter, $90{\mu}m$ height and $150{\mu}m$ pitch was successfully fabricated using subsequent processes of via hole formation with Deep RIE (reactive ion etching), Cu via filling with pulse-reverse electroplating, Si thinning with CMP, photolithography, metal film sputtering, Cu/Sn bump formation, and flip chip bonding. Contact resistance of Cu/Sn bump and Cu via resistance could be determined ken the slope of the daisy chain resistance vs the number of bump joints of the flip chip specimen containing Cu via. When flip- chip bonded at $270^{\circ}C$ for 2 minutes, the contact resistance of the Cu/Sn bump joints of $100{\times}100{\mu}m$ size was 6.7m$\Omega$ and the Cu via resistance of $75{\mu}m$ diameter, $90{\mu}m$ height was 2.3m$\Omega$.
Kim, S.S.;Lim, D.G.;Shim, K.S.;Lee, J.H.;Kim, H.W.;Yi, J.
Solar Energy
/
v.17
no.4
/
pp.3-11
/
1997
Because grain boundaries in polycrystalline silicon act as potential barriers and recombination centers for the photo-generated charge carriers, these defects degrade conversion effiency of solar cell. To reduce these effects of grain boundaries, we investigated various influencing factors such as thermal treatment, various grid pattern, selective wet etching for grain boundaries, buried contact metallization along grain boundaries, grid on metallic thin film. Pretreatment above $900^{\circ}C$ in $N_2$ atmosphere, gettering by $POCl_3$ and Al treatment for back surface field contributed to obtain a high quality poly-Si. To prevent carrier losses at the grain boundaries, we carried out surface treatment using Schimmel etchant. This etchant delineated grain boundaries of $10{\mu}m$ depth as well as surface texturing effect. A metal AI diffusion into grain boundaries on rear side reduced back surface recombination effects at grain boundaries. A combination of fine grid with finger spacing of 0.4mm and buried electrode along grain boundaries improved short circuit current density of solar cell. A ultra-thin Chromium layer of 20nm with transmittance of 80% reduced series resistance. This paper focused on the grain boundary effect for terrestrial applications of solar cells with low cost, large area, and high efficiency.
Copper(Cu) as an interconnecting metal layer can replace aluminum (Al) in IC fabrication since Cu has low electrical resistivity, showing high immunity to electromigration compared to Al. However, it is very difficult for copper to be patterned by the dry etching processes. The chemical mechanical polishing (CMP) process has been introduced and widely used as the mainstream patterning technique for Cu in the fabrication of deep submicron integrated circuits in light of its capability to reduce surface roughness. But this process leaves a large amount of residues on the wafer surface, which must be removed by the post-CMP cleaning processes. Copper corrosion is one of the critical issues for the copper metallization process. Thus, in order to understand the copper corrosion problems in post-CMP cleaning solutions and study the effects of DC biases and post-CMP cleaning solution concentrations on the Cu film, a constant voltage was supplied at various concentrations, and then the output currents were measured and recorded with time. Most of the cases, the current was steadily decreased (i.e. resistance was increased by the oxidation). In the lowest concentration case only, the current was steadily increased with the scarce fluctuations. The higher the constant supplied DC voltage values, the higher the initial output current and the saturated current values. However the time to be taken for it to be saturated was almost the same for all the DC supplied voltage values. It was indicated that the oxide formation was not dependent on the supplied voltage values and 1 V was more than enough to form the oxide. With applied voltages lower than 3 V combined with any concentration, the perforation through the oxide film rarely took place due to the insufficient driving force (voltage) and the copper oxidation ceased. However, with the voltage higher than 3 V, the copper ions were started to diffuse out through the oxide film and thus made pores to be formed on the oxide surface, causing the current to increase and a part of the exposed copper film inside the pores gets back to be oxidized and the rest of it was remained without any further oxidation, causing the current back to decrease a little bit. With increasing the applied DC bias value, the shorter time to be taken for copper ions to be diffused out through the copper oxide film. From the discussions above, it could be concluded that the oxide film was formed and grown by the copper ion diffusion first and then the reaction with any oxidant in the post-CMP cleaning solution.
In this study, surface treatment of the elastomeric matrix was investigated to develop a substituting material for steel dynamic damper of automobile. The key technology is to get ultra high density elastomeric compound in order to substitute steel dynamic damper. The optimum matrix material(chloroprene rubber) and filler(metal powder) were selected for this. The several properties of elastomeric compound were examined. According to the results, the $t_{s2}$ of filled elastomeric compound was decreased with increasing the filler loading whereas the $t_{90}$ was increased. Also, tensile strength and rebound resilience were decreased with filler loading. To solve the problem of high filler loading, the photo grafting technique was employed on elastomeric matrix. The degree of grafting was determined by FTIR-ATR. Also, the filler surface was modified by chemical etching and the surface morphology was examine by SEM. After chemical treatment of filler, the particle size analyzer was used to examined the particle size, size distribution, and morphology of the modified filler.
Research into optical signal processing using photonic integrated circuits (PICs) has been actively pursued in various fields, including optical communication, optical sensors, and quantum optics. Among the materials used in PIC fabrication, polymers have attracted significant interest due to their unique characteristics. To fabricate polymer-based PICs, establishing an accurate manufacturing process for the cross-sectional structure of an optical waveguide is crucial. For stable device performance and high yield in mass production, a process with high reproducibility and a wide tolerance for variation is necessary. This study proposes an efficient method for fabricating polymer optical-waveguide devices by introducing the atomic layer deposition (ALD) process. Compared to conventional photoresist or metal-film deposition methods, the ALD process enables more precise fabrication of the optical waveguide's core structure. Polyimide optical waveguides with a core size of 1.8 × 1.6 ㎛2 are fabricated using the ALD process, and their propagation losses are measured. Additionally, a multimode interference (MMI) optical-waveguide power-splitter device is fabricated and characterized. Throughout the fabrication, no cracking issues are observed in the etching-mask layer, the vertical profiles of the waveguide patterns are excellent, and the propagation loss is below 1.5 dB/cm. These results confirm that the ALD process is a suitable method for the mass production of high-quality polymer photonic devices.
The purpose of this study was to evaluate the effects of surface conditioning with $10\%$ polyacrylic acid, etching with $38\%$ phosphoric acid, and polishing with a slurry of pumice on shear bond strengths of light-cured glass ionomer cement, chemically cured glass ionomer cement, and a composite resin to enamel, and to observe the failure patterns of bracket bondings. Shear bond strengths of glass ionomer cements were compared with that of a composite resin. Metal brackets were bonded on the extracted human bicuspids after enamel surface treatments, and samples were immersed in the $37^{\circ}C$ distilled water bath, and shear bond strengths of glass ionomer cements and a composite resin were measured on the Instron machine after 24hrs passed, and the deboned samples were measured in respect of adhesive remnant index. Scanning electron micrographs were taken of enamel surfaces after various treatments. The data were evaluated and tested by ANOVA and Duncan's multiple range test, and those results were as follows. 1. Shear bond strength of light-cured glass ionomer cement showed statistically higher than that of chemically cured glass ionomer cement. 2. Shear bond strengths of light-cured and chemically cured glass ionomer cements to enamel treated with $10\%$ polyacrylic acid and $38\%$ phosphoric acid showed statistically higher than those with a slurry of pumice. 3. According to scanning electron micrographs, enamel surface conditioned with $10\%$ polyacrylic acid is slightly etched and cleaned, that etched with $38\%$ phosphoric acid is severely etched, and that polished with a slurry of pumice is irregulary scretched and not completely cleaned. 4. After debonding, light-cured glass ionomer cement to enamel treated with $10\%$ polyacrylic acid showed less residual materials on the enamel solace than composite resin to enamel etched with $38\%$ phosphoric acid. 5. There was no significant difference in the shear bond strength of light-cured glass ionomer cement to enamel treated with $10\%$ polyacrylic acid and that of composite resin to enamel etched with $38\%$ Phosphoric acid.
The purpose of this study was to compare the shear bond strength of adhesion bridge by various resin cements. One hundred and foully 1st premolars were used. The teeth were cut below 2mm from CEJ and the coronal portions were used. The coronal portions were embeded with the acrylic resin and trimmed with sic paper until the flat plane with ${\phi}$ 4mm above acrylic resin sticks in height 5mm were casted with nonprecious metal and the using surfaces were treated with sic paper from #200 to #1200 and polished with alminum oxide paste. And then, the using surfaces were sandblasted and treated with the electrochemical etching. The teeth were divided into three groups of fourty two each. In group I, teeth and specimens were cemented with Panavia 21 In group II, teeth and specimens were cemented with Superbond In group I, teeth and specimens were cemented with All-Bond & composite resin cement Each group was subdivided into three subgroups according to the storage period ; one-day storage, fifteen-day storage, and thirty-day storage. The special jig was made. Then, the specimen and jig were mounted to Instron Universal Testing Machine and the failure were measured. The results were as follows. 1. There was statisfically significant difference between the failure loads of group I and group II and III after one day storage(P<0.01), 2. There was statisfically significant difference between the failure loads of group II and group I and III and between group I and group III at fifteen day storage(P<0.01). 3. There was statisfically significant difference between the failure loads of group I and II and group III after thirty day storage(P<0.01). 4. There was statisfically significant difference between the failure loads of one day storage and fifteen and thirty days storages in group III (P<0.01).
Kim, Soo-Hyun;Yim, Sung-Soo;Lee, Do-Joong;Kim, Ki-Su;Kim, Hyun-Mi;Kim, Ki-Bum;Sohn, Hyun-Chul
Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
/
2008.06a
/
pp.239-240
/
2008
As semiconductor devices are scaled down for better performance and more functionality, the Cu-based interconnects suffer from the increase of the resistivity of the Cu wires. The resistivity increase, which is attributed to the electron scattering from grain boundaries and interfaces, needs to be addressed in order to further scale down semiconductor devices [1]. The increase in the resistivity of the interconnect can be alleviated by increasing the grain size of electroplating (EP)-Cu or by modifying the Cu surface [1]. Another possible solution is to maximize the portion of the EP-Cu volume in the vias or damascene structures with the conformal diffusion barrier and seed layer by optimizing their deposition processes during Cu interconnect fabrication, which are currently ionized physical vapor deposition (IPVD)-based Ta/TaN bilayer and IPVD-Cu, respectively. The use of in-situ etching, during IPVD of the barrier or the seed layer, has been effective in enlarging the trench volume where the Cu is filled, resulting in improved reliability and performance of the Cu-based interconnect. However, the application of IPVD technology is expected to be limited eventually because of poor sidewall step coverage and the narrow top part of the damascene structures. Recently, Ru has been suggested as a diffusion barrier that is compatible with the direct plating of Cu [2-3]. A single-layer diffusion barrier for the direct plating of Cu is desirable to optimize the resistance of the Cu interconnects because it eliminates the Cu-seed layer. However, previous studies have shown that the Ru by itself is not a suitable diffusion barrier for Cu metallization [4-6]. Thus, the diffusion barrier performance of the Ru film should be improved in order for it to be successfully incorporated as a seed layer/barrier layer for the direct plating of Cu. The improvement of its barrier performance, by modifying the Ru microstructure from columnar to amorphous (by incorporating the N into Ru during PVD), has been previously reported [7]. Another approach for improving the barrier performance of the Ru film is to use Ru as a just seed layer and combine it with superior materials to function as a diffusion barrier against the Cu. A RulTaN bilayer prepared by PVD has recently been suggested as a seed layer/diffusion barrier for Cu. This bilayer was stable between the Cu and Si after annealing at $700^{\circ}C$ for I min [8]. Although these reports dealt with the possible applications of Ru for Cu metallization, cases where the Ru film was prepared by atomic layer deposition (ALD) have not been identified. These are important because of ALD's excellent conformality. In this study, a bilayer diffusion barrier of Ru/TaCN prepared by ALD was investigated. As the addition of the third element into the transition metal nitride disrupts the crystal lattice and leads to the formation of a stable ternary amorphous material, as indicated by Nicolet [9], ALD-TaCN is expected to improve the diffusion barrier performance of the ALD-Ru against Cu. Ru was deposited by a sequential supply of bis(ethylcyclopentadienyl)ruthenium [Ru$(EtCp)_2$] and $NH_3$plasma and TaCN by a sequential supply of $(NEt_2)_3Ta=Nbu^t$ (tert-butylimido-trisdiethylamido-tantalum, TBTDET) and $H_2$ plasma. Sheet resistance measurements, X-ray diffractometry (XRD), and Auger electron spectroscopy (AES) analysis showed that the bilayer diffusion barriers of ALD-Ru (12 nm)/ALD-TaCN (2 nm) and ALD-Ru (4nm)/ALD-TaCN (2 nm) prevented the Cu diffusion up to annealing temperatures of 600 and $550^{\circ}C$ for 30 min, respectively. This is found to be due to the excellent diffusion barrier performance of the ALD-TaCN film against the Cu, due to it having an amorphous structure. A 5-nm-thick ALD-TaCN film was even stable up to annealing at $650^{\circ}C$ between Cu and Si. Transmission electron microscopy (TEM) investigation combined with energy dispersive spectroscopy (EDS) analysis revealed that the ALD-Ru/ALD-TaCN diffusion barrier failed by the Cu diffusion through the bilayer into the Si substrate. This is due to the ALD-TaCN interlayer preventing the interfacial reaction between the Ru and Si.
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