• International Journal of Internet, Broadcasting and Communication
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• v.13 no.3
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• pp.109-117
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• 2021

Although previous studies on social commerce have provided much insight, more studies in the perspective of social network are needed because social commerce happens within online communities or virtual groups, where buyers connect and interact with each other by sharing information. So, the purpose of this study is to investigate how transactive memory as network characteristic can affect social commerce behavior through social support and relationship quality. We verified the relational effect among social support, relationship quality, and social commerce intention in the Korean market context. Moreover, we found transactive memory capability also played an essential role in the field of social commerce. Specifically, we found consumer's transactive memory capability plays a significant moderating role in the relation between social support and relationship quality.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.3
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• pp.487-494
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• 2020

In this paper, we propose a current memory circuit design that reduces static power consumption and maximizes the advantages of current mode signal processing. The proposed current memory circuit minimizes the problem in which the current transfer error increases as the data transfer time increases due to clock-feedthrough and charge-injection of the existing current memory circuit. The proposed circuit is designed to insert a support MOS capacitor that maximizes the Miller effect in the current transfer structure capable of low-power operation. As a result, it shows the improved current transfer error according to the memory time. From the experimental results of the chip, manufactured with MagnaChip / SK Hynix 0.35 process, it was verified that the current transfer error, according to the memory time, reduced to 5% or less.

• International Journal of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.29-34
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• 2017

Over the past several decades, embedded system and flight control computer technologies have been evolved to meet the diverse needs of the mobile device market. Current embedded systems are at the heart of technologies that can take advantage of small-sized specialized hardware while still providing high-efficiency performance at low cost. One of these key technologies is multiple memory banks. For example, a dual memory bank can provide two times more memory bandwidth in the same memory space. This benefit take lower cost to provide the same bandwidth. However, there is still few software technologies to support the efficient use of multiple memory banks. In this study, we present a technique to efficiently exploit multiple memory banks by software support. Specifically, our technique use an interference graph to optimally allocate data to different memory banks by an optimizing compiler. As a result, the execution time can be improved upto 7% with the proposed technique.

• The Korean Journal of Rehabilitation Nursing
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• v.3 no.2
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• pp.181-195
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• 2000

The purpose of this study is to find out the effects of personal characteristics, social support, depression, and metamemory on the older adults' memory performances. The subjects of the study consisted of 95 older adults over the age of 60 who are living in Busan. Some data were collected by means of the interview method, using questionnaires for metamemory (MIA questionnaire by Dixon, et al., 1988), and depression(GDS by Yesavage and Sheikl, 1986), social resoueces(Duke university, 1978), family support(Hyun-Sook Kang, 1985). The other data were collected by the testing method on the memory performance such as the immeadiate word recall task, the delayed word recall task, the word recognition task(Elderly Verbal Learning Test by Kyung Mi Choi, 1998), and the face recognition task(Face Recognition Task tool developed by Hye-Sook Min). The results of this study were as follows; 1. The level of metamemory is 3.4 points in the 5 point scale, the grades of the task and the achievement are relatively high and the grades of the change, the control, and the anxiety are relatively low in the sub-concepts. 2. Metamemory have significant relation with age(r=-.44), educational attainment(r=.46), depression(r=-.58), family support(r=.20), social resources(r=.20). 3. The significant variables to predict older adults' metamemory are educational attainment(22%), sex(11%), age (8.3%), depression(4.7%), and illness state(3%). 4. The strong variables to predict memory performances are metamemory, age, depression, social resources, educational attainment, illness state, and limitation of daily living activity related to illness. In conclusion, the enhancement strategies of metamemory and the social support and the prevention or reduction of depression are necessary to increase older adults' memory performances. Ultimately in this respect nurses' roles are very important in developing and performing some intervention programs for old adults' memory improvement, which have significant meanings in the field of nursing science.

• International Journal of Contents
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• v.3 no.3
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• pp.1-5
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• 2007

The main memory DBMS (MMDBMS) efficiently supports various database applications that require high performance since it employs main memory rather than disk as a primary storage. An index manager is an essential sub-component of a DBMS used to speed up the retrieval of objects from a large volume of a database in response to a certain search condition. Previous research efforts on indexing proposed various index structures. However, they hardly dealt with the practical issues occurred in implementing an index manager on a target DBMS. In this paper, we touch these issues and present our experiences in developing the index manager. The main issues are (1) compact representation of an index entry, (2) support of variable-length keys. (3) support of multiple-attribute keys, and (4) support of duplicated keys.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.9
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• pp.445-458
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• 2007

This article presents a novel infrastructure for large-memory database processing using commodity hardware with operating system support. We exploit inexpensive PCs and a high-speed network capable of Remote Direct Memory Access (RDMA) operations to build a new memory hierarchy between fast volatile memory and slow disk storage. The new memory hierarchy guarantees a reasonable response time, and its storage size enables us to run large-memory database systems with little performance degradation. The proposed architecture has two main components: (1) a remote memory system inside the Linux kernel to manage other computers' memory pages efficiently and (2) a remote memory pager responsible for manipulating remote read/write operations on remote memory pages. We insist that the proposed architecture is practical enough to support the rigorous demands of commercial in-memory database systems by demonstrating the performance of publicly available main-memory databases (e.g., MySQL) on our prototyped system. The experimental results show very interesting results from the TPC-C benchmark.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.49 no.2
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• pp.149-156
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• 2012

Support vector machines (SVMs) are well known for their pattern recognition capability, but proper care should be taken to alleviate their inherent implementation cost resulting from high computational intensity and memory requirement, especially in embedded systems where only limited resources are available. Since the memory requirement determined by the dimensionality and the number of support vectors is generally too high for a cache in embedded systems to accomodate, frequent accesses to the main memory occur inevitably whenever the cache is not able to provide requested data to the processor. These frequent accesses to the main memory result in overall performance degradation and increased energy consumption because a memory access typically takes longer and consumes more energy than a cache access or a register access. In this paper, we propose a technique that reduces the number of main memory accesses by optimizing the data access pattern of the SVM-based classifier in such a way that the temporal locality of the accesses increases, fully utilizing data loaded into the processor chip. With experiments, we confirm the enhancement made by the proposed technique in terms of the number of memory accesses, overall execution time, and energy consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.223-231
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• 2015

As smartphones support a variety of applications and their memory demand keeps increasing, the design of an efficient memory management policy is becoming increasingly important. Meanwhile, as nonvolatile memory (NVM) technologies such as PCM and STT-MRAM have emerged as new memory media of smartphones, characterizing memory references for NVM-based smartphone memory systems is needed. For the deep understanding of memory access features in smartphones, this paper performs comprehensive analysis of memory references for various smartphone applications. We first analyze the temporal locality and frequency of memory reference behaviors to quantify the effects of the two properties with respect to the re-reference likelihood of pages. We also analyze the skewed popularity of memory references and model it as a Zipf-like distribution. We expect that the result of this study will be a good guidance to design an efficient memory management policy for future smartphones.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.251-254
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• 1998

This paper suggests two data exchange protocols (DEPs) using shared memory. They support reliable data exchanges among components which are located in the same rack and use the same backplane bus and shared memory.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.267-269
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• 2006

Recently, flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional Indexing scheme such as B-Tree due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new indexing scheme called F-Tree. F-Tree improves tree operation performance by compressing pointers and keys in tree nodes and rewriting the nodes without a slow erase operation in node insert/delete processes.