The Journal of the Korea institute of electronic communication sciences (한국전자통신학회논문지)

Korea Institute of Electronic Communication Science (한국전자통신학회)
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Current Transfer Structure based Current Memory using Support MOS Capacitor

Support MOS Capacitor를 이용한 Current Transfer 구조의 전류 메모리 회로

  • 김형민 (서울과학기술대학교 대학원 정보통신미디공학과) ;
  • 박소연 (서울과학기술대학교 대학원 IT미디어공학과) ;
  • 이대니얼주헌 (서울과학기술대학교 대학원 IT융합공학과) ;
  • 김성권 (서울과학기술대학교 전자IT미디어공학과)
  • Received : 2020.04.28
  • Accepted : 2020.06.15
  • Published : 2020.06.30
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Abstract

In this paper, we propose a current memory circuit design that reduces static power consumption and maximizes the advantages of current mode signal processing. The proposed current memory circuit minimizes the problem in which the current transfer error increases as the data transfer time increases due to clock-feedthrough and charge-injection of the existing current memory circuit. The proposed circuit is designed to insert a support MOS capacitor that maximizes the Miller effect in the current transfer structure capable of low-power operation. As a result, it shows the improved current transfer error according to the memory time. From the experimental results of the chip, manufactured with MagnaChip / SK Hynix 0.35 process, it was verified that the current transfer error, according to the memory time, reduced to 5% or less.

본 논문에서는 정적소비전력을 줄이며, 전류 모드 신호처리의 장점을 최대로 올릴 수 있는 전류 메모리 회로 설계를 제안한다. 제안하는 전류 메모리 회로는 기존의 전류 메모리 회로가 갖는 Clock-Feedthrough와 Charge-Injection 등으로 인해 데이터 저장 시간이 길어지면서 전류 전달 오차가 심해지는 문제를 최소화하며, 저전력 동작이 가능한 Current Transfer 구조에 밀러 효과(Miller effect)를 극대화하는 Support MOS Capacitor를 삽입하는 설계로, 저장 시간에 따르는 개선된 전류 전달 오차를 보였다. 매그나칩/SK하이닉스 0.35㎛ 공정으로 칩 제작을 통한 실험 결과, 저장 시간에 따르는 전류 전달 오차가 5% 이하로 개선되는 것을 검증하였다.

Keywords

References

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