• Title/Summary/Keyword: Memory bias

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Implicit and Explicit Memory Bias in Panic Disorder (공황장애의 암묵 및 외현기억 편향)

  • Jung, Na-Young;Chae, Jeong-Ho;Lee, Kyoung-Uk
    • Anxiety and mood
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    • v.8 no.1
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    • pp.3-8
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    • 2012
  • Patients with panic disoder (PD) show recollection of their first panic attack, which resembles a trauma that is perceived as an unexpected frightening and subjectively life-threatening event. Information-processing models suggest that anxiety disorders may be characterized by a memory bias for threat-related information. This paper reviews the previous researches that investigated the implicit and/or explicit biases in patients with panic disorder. Among the 17 studies, which addressed the explicit memory bias in PD patients, 11 (64.7%) were found to be explicit memory bias in PD patients. In regards to the implicit memory bias, 4 out of 9 studies (44.4%) were found to support the memory bias. The result shows that evidence of explicit memory bias in PD patients was supported by a number of previous researches. However, evidence of implicit memory bias seems less robust, thus, needs further research for replication. Also, development of new paradigms and applications of various methods will be needed in further researches on memory bias in PD patients.

Design Method for Shape Memory Alloy Actuator with Bias Spring (Bias 스프링을 이용한 형상기억합금 액츄에이터의 설계 방법)

  • Lee, Seung-Ki;Na, Seung-Woo
    • Journal of Sensor Science and Technology
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    • v.7 no.6
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    • pp.437-445
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    • 1998
  • The actuator using shape memory alloy spring with bias spring can act as a bidirectional actuator due to the restoring force of the bias spring. In the design of shape memory actuator with bias spring, the required design specifications are the generated force and the necessary stroke. To fulfill these requirements, shape memory alloy spring and bias spring should be designed carefully considering the specified application. In this paper, the novel design method for shape memory alloy actuator with bias spring, which does not require any assumptions from experience, has been proposed and verified by the test of fabricated shape memory alloy actuator. The experimental results show good agreements with calculated values, which guarantees the practical validity of our proposed design method.

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A Study on Confirmation Bias in Early User Experience Stage (초기 사용자 경험 단계의 확증편향에 관한 연구)

  • Lee, Young-Ju
    • Journal of Digital Convergence
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    • v.19 no.1
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    • pp.355-360
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    • 2021
  • In this study, the factors of confirmation bias that may occur in the initial user experience stage were analyzed using a honeycomb model by deriving user experience factors for each factor. In the initial user experience stage, confirmation bias occurs in the impression stage. At the processing stage of memory, sensory memory, working memory, and long-term memory, which stores and retrieves selective memory, were closely related. Confirmation bias was classified into visibility, correlation, memory, clarity, and universality in the usability part, and satisfaction, joy, and dissatisfaction were derived as emotional factors. As a result of the analysis with the honeycomb model, visuality, clarity, universality in the usability factor, and joy in the emotional factor had little effect on the confirmation bias, and satisfaction and dissatisfaction were analyzed as the main factors of the confirmation bias in the correlation, memory and emotional factors. This study is meaningful in that it can be usefully used as a reference material for companies that customize design patterns for the factor of confirmation bias.

Design of a Bias Circuit for Reducing Memory Effects (Memory Effect를 줄이기 위한 바이어스 회로의 설계)

  • Kang, Sanggee
    • Journal of Satellite, Information and Communications
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    • v.12 no.4
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    • pp.115-119
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    • 2017
  • Intermodulation distortion degrades the S/N(signal-to-noise) of the original signal and also affects the adjacent channels. Intermodulation distortion is mainly caused by the nonlinear characteristics of the power amplifier. If the power amplifier with nonlinear characteristics has a memory effect, the intermodulation distortions occurred in the power amplifier are generated in various and complex forms. The predistorter is used as a way to improve intermodulation distortions. In order to efficiently utilize the performance of the predistorter, the memory effect of the power amplifier must be reduced. In this paper, we describe the design method of bias circuit to reduce the memory effect in power amplifiers. To reduce the memory effect, the bias circuit must have a high impedance for the signal and a low impedance for the envelope(modulating signal) and the second harmonic component of the signal. To verify the performance of the bias circuit designed considering the memory effect, a power amplifier operating at 170 ~ 220MHz was designed and implemented. The designed bias circuit has a large impedance in the operating frequency band and low impedance in the envelope signal and the second harmonic of the signal. As a result of the performance measurement, it was found that the asymmetric intermodulation distortion component is improved by 3.7dB.

Temperature-Adaptive Back-Bias Voltage Generator for an RCAT Pseudo SRAM

  • Son, Jong-Pil;Byun, Hyun-Geun;Jun, Young-Hyun;Kim, Ki-Nam;Kim, Soo-Won
    • ETRI Journal
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    • v.32 no.3
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    • pp.406-413
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    • 2010
  • In order to guarantee the proper operation of a recessed channel array transistor (RCAT) pseudo SRAM, the back-bias voltage must be changed in response to changes in temperature. Due to cell drivability and leakage current, the obtainable back-bias range also changes with temperature. This paper presents a pseudo SRAM for mobile applications with an adaptive back-bias voltage generator with a negative temperature dependency (NTD) using an NTD VBB detector. The proposed scheme is implemented using the Samsung 100 nm RCAT pseudo SRAM process technology. Experimental results show that the proposed VBB generator has a negative temperature dependency of -0.85 $mV/^{\circ}C$, and its static current consumption is found to be only 0.83 ${\mu}A$@2.0 V.

Characterization Studies on Data Access Bias in Mobile Platforms

  • Bahn, Hyokyung
    • International journal of advanced smart convergence
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    • v.10 no.4
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    • pp.52-58
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    • 2021
  • Data access bias can be observed in various types of computing systems. In this paper, we characterize the data access bias in modern mobile computing platforms. In particular, we focus on the access bias of data observed at three different subsystems based on our experiences. First, we show the access bias of file data in mobile platforms. Second, we show the access bias of memory data in mobile platforms. Third, we show the access bias of web data and web servers. We expect that the characterization study in this paper will be helpful in the efficient management of mobile computing systems.

A Comparative Analysis on Competitiveness for Computer Parts Industry between Korea and China (한.중 컴퓨터 부품산업의 경쟁력 비교분석)

  • Kim, Ji-Yong;Lee, Chang-Hyeon
    • International Commerce and Information Review
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    • v.9 no.2
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    • pp.423-439
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    • 2007
  • The purpose of this study was to analyze market competitiveness of Korean and Chinese computer parts industry in the between two countries' market by using Index of Export Bias and Market Comparative Advantage Index. For attaining the purpose of study, we classified the computer parts which exported to the two countries' market and the imported products as the memory devices and input/output peripheral devices. Analyzing period was 2001-2006. The analysis of Korean results of Index of Export Bias indicated that memory devices represented low overall numerical value and the Chinese results of Index of Export Bias indicated that memory devices represented high gradual numerical value. On the other hand, Korean input/output peripheral devices have been increasing steadily for analysis period and China input/output peripheral devices have been decreasing steadily for analysis period. Additional results indicated that the Korean and China computer parts which gained market competitiveness between two countries market were as follows. Korean memory devices have been losing competitiveness in the China market steadily and Chinese memory devices have been acquire competitiveness in the Korean market gradually. In input/output peripheral devices case, Korean products represented powerful competitiveness in the China market and Chinese products have been gaining competitiveness in the Korea market.

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Effect of Substrate Bias on the Performance of Programming and Erasing in p-Channel Flash Memory (기판 전압이 p-채널 플래쉬 메모리의 쓰기 및 소거 특성에 미치는 영향)

  • 천종렬;김한기;장성준;유종근;박종태
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.879-882
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    • 1999
  • The effects of the substrate bias on the performance of programming erasing in p-channel flash memory cell have been investigated. It is found that applying positive substrate bias can improve the programming and erasing speed. This improvements can be explained by Substrate Current Induced Hot Electron Injection. From the results, we can confirm that BTB programming method is better in programming and erasing speed than CHE programming method.

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Effects of Drain Bias on Memory-Compensated Analog Predistortion Power Amplifier for WCDMA Repeater Applications

  • Lee, Yong-Sub;Lee, Mun-Woo;Kam, Sang-Ho;Jeong, Yoon-Ha
    • Journal of electromagnetic engineering and science
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    • v.9 no.2
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    • pp.78-84
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    • 2009
  • This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.

A Study on a Substrate-bias Assisted 2-step Pulse Programming for Realizing 4-bit SONOS Charge Trapping Flash Memory (4비트 SONOS 전하트랩 플래시메모리를 구현하기 위한 기판 바이어스를 이용한 2단계 펄스 프로그래밍에 관한 연구)

  • Kim, Byung-Cheul;Kang, Chang-Soo;Lee, Hyun-Yong;Kim, Joo-Yeon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.6
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    • pp.409-413
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    • 2012
  • In this study, a substrate-bias assisted 2-step pulse programming method is proposed for realizing 4-bit/1-cell operation of the SONOS memory. The programming voltage and time are considerably reduced by this programming method than a gate-bias assisted 2-step pulse programming method and CHEI method. It is confirmed that the difference of 4-states in the threshold voltage is maintained to more than 0.5 V at least for 10-year for the multi-level characteristics.