• 전기전자학회논문지
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• 제25권4호
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• pp.778-781
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• 2021

본 논문에서는 SPICE를 사용한 16단 3D NAND Flash memory compact modeling을 제안한다. 동일한 structure와 simulation 조건에서 Down Coupling Phenomenon(DCP)과 Natural Local Self Boosting(NLSB)에 대한 channel potential을 Technology Computer Aided Design(TCAD) tool Atlas(Silvaco^TM)와 SPICE로 simulation하고 분석했다. 그 결과 두 현상에 대한 TCAD와 SPICE의 channel potential이 매우 유사한 것을 확인할 수 있었다. SPICE는 netlist를 통해 소자 structure를 직관적으로 확인할 수 있다. 또한, simulation 시간이 TCAD에 비해 짧게 소요된다. 그러므로 SPICE를 이용하여 3D NAND Flash memory의 효율적인 연구를 기대할 수 있다.

• 한국신뢰성학회지:신뢰성응용연구
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• 제10권1호
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• pp.65-71
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• 2010

NAND-type SONOS with a separated double-gate FinFET structure (SDF-Fin SONOS) flash memory devices are proposed to reduce the unit cell size of the memory device and increase the memory density in comparison with conventional non volatile memory devices. The proposed memory device consists of a pair of control gates separated along the direction of the Fin width. There are two unique alternative technologies in this study. One is a channel doping method and the other is an oxide thickness variation method, which are used to operate the SDF-Fin SONOS memory device as two-bit. The fabrication processes and the device characteristics are simulated by using technology comuter-adided(TCAD). The simulation results indicate that the charge trap probability depends on the different channel doping concentration and the tunneling oxide thickness. The proposed SDG-Fin SONOS memory devices hold promise for potential application.

• 대한임베디드공학회논문지
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• 제13권5호
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• pp.261-268
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• 2018

Phase Change Memory(PCM) with low power consumption and high integration attracts attention as a next generation nonvolatile memory replacing DRAM. However, there is a problem that PCM has long latency and high energy consumption due to the writing operation. The PCM & DRAM hybrid memory structure is a fruitful structure that can overcome the disadvantages of such PCM. However, the page replacement algorithm is important, because these structures use two memory of different characteristics. The purpose of this document is to effectively manage pages that can be referenced in memory, taking into account the characteristics of DRAM and PCM. In order to manage these pages, this paper proposes an page replacement algorithm based on frequently accessed and recently paged. According to our simulation, the proposed algorithm for the DRAM&PCM hybrid can reduce the energy-delay product by around 10%, compared with Clock-DWF and CLOCK-HM.

• Smart Structures and Systems
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• 제31권5호
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• pp.531-543
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• 2023

Base isolation is one of the most widely implemented and well-known technique to reduce structural vibration and damages during an earthquake. However, while the base-isolated structure reduces storey drift significantly, it also increases the base drifts causing many practical problems. This study proposes the use of Shape Memory Alloys (SMA) wires for the reduction in base drift while controlling the overall structure vibrations. A multi-degree-of-freedom (MDOF) structure along with base isolators and Shape-Memory-Alloys (SMA) wires in diagonal is tested experimentally and analytically. The isolation bearing considered in this study consists of laminates of steel and silicon rubber. The performance of the proposed structure is evaluated and studied under different loadings including harmonic loading and seismic excitation. To assess the seismic performance of the proposed structure, shake table tests are conducted on base-isolated MDOF frame structure incorporating SMA wires, which is subjected to incremental harmonic and historic seismic loadings. Root mean square acceleration, displacement and drift are analyzed and discussed in detail for each story. To better understand the structure response, the percentage reduction of displacement is also determined for each story. The result shows that the reduction in the response of the proposed structure is much better than conventional base-isolated structure.

• 한국전기전자재료학회논문지
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• 제18권12호
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• pp.1069-1074
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• 2005

In this work, nano-needle structures ate formed to solve problem, related to low density of quantum dots for nano floating gate memory. Such structures ate fabricated and electrical properties' of MIS devices fabricated on the nano-structures are studied. Nano floating gate memory based on quantum dot technologies Is a promising candidate for future non-volatile memory devices. Nano-structure is fabricated by reactive ion etching using $SF_6$ and $O_2$ gases in parallel RF plasma reactor. Surface morphology was investigated after etching using scanning electron microscopy Uniform and packed deep nano-needle structure is established under optimized condition. Photoluminescence and capacitance-voltage characteristics were measured in $Al/SiO_2/Si$ with nano-needle structure of silicon. we have demonstrated that the nano-needle structure can be applicable to non-volatile memory device with increased charge storage capacity over planar structures.

• 한국진공학회지
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• 제7권3호
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• pp.195-200
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• 1998

본 연구에서는 강유전체 박막의 게이트 산화물로 사용한 $Pt/SrBi_2Ta_2O_9(SBT)/CeO_2/Si(MFS)$와 Pt/SBT/Si(MFS) 구조의 결정 구조 및 전기적 성질 의 차이를 연구하였다. XRD 및 SEM 측정 결과 SBT/$CeO_2$/Si박막은 약5nm정도의 $SiO_2$층 이 형성되었고 비교적 평탄한 계면의 미세구조를 가지는 반면, SBT/Si는 각각 약6nm와 7nm정도의 $SiO_2$층과 비정질 중간상층이 형성되었음을 알 수 있다. 즉 CeO2 박막을 완충층 으로 사용함으로써 SBT박막과 Si기판의 상호 반응을 적절히 억제할 수 있음을 확인하였다. Pt/SBT/$CeO_2/Pt/SiO_2$/와 Pt/SBT/Pt/$SiO_2$/Si구조에서 Polarization-Electric field(P-E) 특 성을 비교해 본 결과 CeO2박막의 첨가에 따라 잔류분극값은 감소하였고 항전계값은 증가하 였다. MFIS구조에서 memory window값은 항전계값과 직접적 관련이 있으므로 이러한 항 전계값의 증가는 MFIS구조에서의 memory window값이 증가할 수 있음을 나타낸다. Pt-SBT(140nm)/$CeO_2$(25nm)/Si구조에서 Capacitance-Voltage(C-V) 측정 결과로부터 동작 전압 4-6V에서 memory wondows가 1-2V정도로 나타났다. SBT박막의 두께가 증가할수록 memory window값은 증가하였는데 memory wondows가 1-2V정도로 나타났다. SBT박막의 두께가 증가할수록 memory window값은 증가하였는데 이는 SBT박막에 걸리는 전압강하가 증가하기 때문인 것으로 생각되어진다. Pt/SBT/$CeO_2$/Si의 누설전류는 10-8A/cm2정도였고 Pt/SBT/Si 구조에서는 약10-6A/cm2정도로 약간 높은 값을 나타내었다.

• 한국복합재료학회:학술대회논문집
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• 한국복합재료학회 2003년도 추계학술발표대회 논문집
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• pp.146-149
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• 2003

Two-way shape memory effect(TWSME) under residual stresses are considered in the present study. The structure using two-way shape memory alloy(SMA) concept returns to its initial shape by increasing or decreasing temperature under the initially given residual stress. In the present study, we use a thermo-mechanical constitutive equation of SMA and laminated composite plates are considered as simple morphing structural components which are based on first order shear deformable laminated composite plate with large deflection. Numerical results of fully coupled SMA-composite structures are presented

• 한국수자원학회:학술대회논문집
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• 한국수자원학회 2020년도 학술발표회
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• pp.101-101
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• 2020

Traditional stochastic simulation of hydroclimatological variables often underestimates the variability and correlation structure of larger timescale due to the difficulty in preserving long-term memory. However, the Long Short-Term Memory (LSTM) model illustrates a remarkable long-term memory from the recursive hidden and cell states. The current study, therefore, employed the LSTM model in stochastic generation of hydrologic and climate variables to examine how much the LSTM model can preserve the long-term memory and overcome the drawbacks of conventional time series models such as autoregressive (AR). A trigonometric function and the Rössler system as well as real case studies for hydrological and climatological variables were tested. Results presented that the LSTM model reproduced the variability and correlation structure of the larger timescale as well as the key statistics of the original time domain better than the AR and other traditional models. The hidden and cell states of the LSTM containing the long-memory and oscillation structure following the observations allows better performance compared to the other tested conventional models. This good representation of the long-term variability can be important in water manager since future water resources planning and management is highly related with this long-term variability.

• ETRI Journal
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• 제26권6호
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• pp.615-621
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• 2004

Next generation mobile communication system, such as IMT-2000, adopts Turbo codes due to their powerful error correction capability. This paper presents a block-wise maximum a posteriori (MAP) Turbo decoding structure with a low memory requirement. During this research, it has been observed that the training size and block size determine the amount of required memory and bit-error rate (BER) performance of the block-wise MAP decoder, and that comparable BER performance can be obtained with much shorter blocks when the training size is sufficient. Based on this observation, a new decoding structure is proposed and presented in this paper. The proposed block-wise decoder employs a decoding scheme for reducing the memory requirement by setting the training size to be N times the block size. The memory requirement for storing the branch and state metrics can be reduced 30% to 45%, and synthesis results show that the overall memory area can be reduced by 5.27% to 7.29%, when compared to previous MAP decoders. The decoder throughput can be maintained in the proposed scheme without degrading the BER performance.

• Bulletin of the Korean Chemical Society
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• 제29권11호
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• pp.2172-2182
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• 2008