• Journal of the Korea institute for structural maintenance and inspection
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• v.23 no.1
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• pp.130-137
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• 2019

Precast concrete (PC) structure is one of the type of the structures which is made in a facility prior to installing it to a construction field. The contact surfaces between two PC structures should be treated for obtaining enough binding force by inducing prestressing force. However, in the many cases, the contact surface causes the crack and leakage of water. These cracks and water leakage can cause the corrosion of the rebar, and the corrosion of the rebar can severely reduce the long-term durability. In this study, the SMA wire connector is suggested to solve the problem with the contact surfaces between two PC structures. The pull-out resistance of the suggested SMA wire connector is evaluated by conducting the tests to find the effect of the number of wires, shape of connector part, and shape memory effect. As a result of this study, the empirical formula is suggested to estimate the pull-out resistance related with the effects of the shape of the connector, shape memory effect, and the adhesive force. The validity between the estimated pull-out resistance and the measured value is confirmed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.12
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• pp.2333-2340
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• 2017

Recently industry is suffering severe losses of important internal information, and most of the leaks result from the insiders. Thus, various technological counter measures are being studied in order to protect private organization information. In this paper, among various internal information leakage path protection mechanisms, we propose a technique for preventing files which are defined as confidential from being copied or moved through USB. The implemented confidential file loss prevention system is composed of both signature insert manager and confidential file detect manager. The signature insert manager allows a system administrator to insert a special pattern specifying a classified confidential file, while the confidential file detect manager protects confidential file leakage when a user attempts to move or copy a confidential file to the USB memory. This results would be contributed to reducing the damage caused by leakage of confidential files outside of the company via USB.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.4
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• pp.2276-2291
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• 2017

Data protection of removable storage devices is an important issue in information security. Unfortunately, most existing data protection mechanisms are aimed at protecting computer platform which is not suitable for ultra-low-power devices. To protect the flash disk appropriately and efficiently, we propose a trust based USB flash disk, named UTrustDisk. The data protection technologies in UTrustDisk include data authentication protocol, data confidentiality protection and data leakage prevention. Usually, the data integrity protection scheme is the bottleneck in the whole system and we accelerate it by WH universal hash function and speculative caching. The speculative caching will cache the potential hot chunks for reducing the memory bandwidth pollution. We adopt the symmetric encryption algorithm to protect data confidentiality. Before mounting the UTrustDisk, we will run a trusted virtual domain based lightweight virtual machine for preventing information leakage. Besides, we prove formally that UTrustDisk can prevent sensitive data from leaking out. Experimental results show that our scheme's average writing throughput is 44.8% higher than that of NH scheme, and 316% higher than that of SHA-1 scheme. And the success rate of speculative caching mechanism is up to 94.5% since the access pattern is usually sequential.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.624-627
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• 2003

The BLT thin-films were one of the promising ferroelectric materials with a good leakage current and degradation behavior on Pt electrode. The BLT target was sintered at $1100^{\circ}C$ for 4 hours at the air ambient. $Bi_{3.25}La_{0.75}Ti_3O_{12}$ (BLT) thin-film deposited on $Pt/Ti/SIO_2/Si$ wafer by rf magnetron sputtering method. At annealed $700^{\circ}C$, (117) and (006) peaks appeared the high intensity. The hysteresis loop of the BLT thin films showed that the remanent polarization ($2Pr=Pr^+-Pr^-$) was $16uC/cm^2$ and leakage current density was $1.8{\times}10^{-9}A/cm^2$ at 50 kV/cm with coersive electric field when BLT thin-films were annealed at $700^{\circ}C$. Also, the thin film showed fatigue property at least up to $10^{10}$ switching bipolar pulse cycles under 7 V. Therefore, we induce access to optimum fabrication condition of memory device application by rf-magnetron sputtering method in this report.

• The Korean Journal of Physiology and Pharmacology
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• v.26 no.1
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• pp.47-57
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• 2022

Stiripentol is an anti-epileptic drug for the treating of refractory status epilepticus. It has been reported that stiripentol can attenuate seizure severity and reduce seizure-induced neuronal damage in animal models of epilepsy. The objective of the present study was to investigate effects of post-treatment with stiripentol on cognitive deficit and neuronal damage in the cornu ammonis 1 (CA1) region of the hippocampus proper following transient ischemia in the forebrain of gerbils. To evaluate ischemia-induced cognitive impairments, passive avoidance test and 8-arm radial maze test were performed. It was found that post-treatment with stiripentol at 20 mg/kg, but not 10 or 15 mg/kg, reduced ischemia-induced memory impairment. Transient ischemia-induced neuronal death in the CA1 region was also significantly attenuated only by 20 mg/kg stiripentol treatment after transient ischemia. In addition, 20 mg/kg stiripentol treatment significantly decreased ischemia-induced astrocyte damage and immunoglobulin G leakage. In brief, stiripentol treatment after transient ischemia ameliorated transient ischemia-induced cognitive impairment in gerbils, showing that pyramidal neurons were protected and astrocyte damage and blood brain barrier leakage were significantly attenuated in the hippocampus. Results of this study suggest stiripentol can be developed as a candidate of therapeutic drug for ischemic stroke.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.410-410
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• 2013

Next-generation nonvolatile memory (NVM) has attracted increasing attention about emerging NVMs such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory and resistance random access memory (RRAM). Previous studies have demonstrated that RRAM is promising because of its excellent properties, including simple structure, high speed and high density integration. Many research groups have reported a lot of metal oxides as resistive materials like TiO2, NiO, SrTiO3 and ZnO [1]. Among them, the ZnO-based film is one of the most promising materials for RRAM because of its good switching characteristics, reliability and high transparency [2]. However, in many studies about ZnO-based RRAMs, there was a problem to get lower current level for reducing the operating power dissipation and improving the device reliability such an endurance and an retention time of memory devices. Thus in this paper, we investigated that highly reproducible bipolar resistive switching characteristics of W doped ZnO RRAM device and it showed low resistive switching current level and large ON/OFF ratio. This may be caused by the interdiffusion of the W atoms in the ZnO film, whch serves as dopants, and leakage current would rise resulting in the lowering of current level [3]. In this work, a ZnO film and W doped ZnO film were fabricated on a Si substrate using RF magnetron sputtering from ZnO and W targets at room temperature with Ar gas ambient, and compared their current levels. Compared with the conventional ZnO-based RRAM, the W doped ZnO ReRAM device shows the reduction of reset current from ~$10^{-6}$ A to ~$10^{-9}$ A and large ON/OFF ratio of ~$10^3$ along with self-rectifying characteristic as shown in Fig. 1. In addition, we observed good endurance of $10^3$ times and retention time of $10^4$ s in the W doped ZnO ReRAM device. With this advantageous characteristics, W doped ZnO thin film device is a promising candidates for CMOS compatible and high-density RRAM devices.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.765-770
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• 2001

Metal-ferroelectric-insulator- semiconductor(MFTS) devices by using rapid thermal annealed (RTA) LiNbO$_3$/AIN/Si(100) structures were successfully fabricated and demonstrated nonvolatile memory operations. Metal-insulator-semiconductor(MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2 V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/$\textrm{cm}^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8 V, 50 % duty cycle) in the 500 kHz.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.21-26
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• 2005

The field effect transistors (FETs) were fabricated ell $Y_2O_3/Si(100)$ substrates by the conventional memory processes and sol-gel process using $(Bi,La)Ti_3O_{12}(BLT)$ ferroelectric gate materials. The remnant polarization ($2Pr = Pr^+-Pr^-$) int Pt/BLT/Pt/Si capacitors increased from $22 {\mu}C/cm^2$ to $30{\mu}C/ cm^2$ at 5V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. There was no drastic degradation in the polarization values after applying the retention read pulse for $10^{5.5}$ seconds. The capacitance-voltage data of $Pt/BLT/Y_2O_3/Si$ capacitors at 5V input voltage showed that the memory window voltage decreased from 1.4V to 0.6V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. The leakage current of the $Pt/BLT/Y_2O_3/Si$ capacitors annealed at $750^{\circ}C$ was about $510^{-8}A/cm^2$ at 5V. From the drain currents versus gate voltages ($V_G$) for $Pt/BLT/Y_2O_3/Si(100)$ FET devices, the memory window voltages increased from 0.3V to 0.8V with increasing tile $V_G$ from 3V to 5V.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.288-288
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• 2011

최근 Charge Trap Flash (CTF) Non-Volatile Memory (NVM) 소자가 30 nm node 이하로 보고 되면서, 고집적화 플래시 메모리 소자로 각광 받고 있다. 기존의 CTF NVM 소자의 tunnel layer로 쓰이는 SiO2는 성장의 용이성과 Si 기판과의 계면특성, 낮은 누설전류와 같은 장점을 지니고 있다. 하지만 단일층의 SiO2를 tunnel layer로 사용하는 기존의 Non-Valatile Memory (NVM)는 두께가 5 nm 이하에서 direct tunneling과 Stress Induced Leakage Current (SILC) 등의 효과로 인해 게이트 누설 전류가 증가하여 메모리 보존특성의 감소와 같은 신뢰성 저하에 문제점을 지니고 있다. 이를 극복하기 위한 방안으로, 최근 CTF NVM 소자의 Tunnel Barrier Engineered (TBE) 기술이 많이 접목되고 있는 상황이다. TBE 기술은 SiO2 단일층 대신에 서로 다른 유전율을 가지는 절연막을 적층시킴으로서 전계에 대한 민감도를 높여 메모리 소자의 쓰기/지우기 동작 특성과 보존특성을 동시에 개선하는 방법이다. 또한 터널링 절연막으로 유전률이 큰 High-K 물질을 이용하면 물리적인 두께를 증가시킴으로서 누설 전류를 줄이고, 단위 면적당 gate capacitance값을 늘릴 수 있어 메모리 소자의 동작 특성을 개선할 수 있다. 본 연구에서는 CTF NVM 소자의 trap layer로 쓰이는 HfO2의 두께를 5 nm, blocking layer의 역할을 하는 Al2O3의 두께를 12 nm로 하고, tunnel layer로 Si3N4막 위에 유전율과 Energy BandGap이 유사한 HfAlO와 ZrO2를 적층하여 Program/Erase Speed, Retention, Endurance를 측정을 통해 메모리 소자로서의 특성을 비교 분석하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.159-160
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• 2012

지난 30년 동안 플래시 메모리의 주류 역할을 하였던 부유 게이트 플래시 메모리는 40 nm 기술 노드 이하에서 셀간 간섭, 터널 산화막의 누설전류 등에 의한 오동작으로 기술적 한계를 맞게 되었다. 또한 기존의 비휘발성 메모리는 동작 시 높은 전압을 요구하므로 전력소비 측면에서도 취약한 단점이 있다. 그러나 이러한 문제점들을 기존의 Si기반의 소자기술이 아닌 새로운 재료나 공정을 통해서 해결하려는 연구가 최근 활발하게 진행되고 있다. 특히, 플래시 메모리의 중요한 구성요소의 하나인 터널 산화막은 메모리 소자의 크기가 줄어듦에 따라서 SiO2단층 구조로서는 7 nm 이하에서 stress induced leakage current (SILC), 직접 터널링 전류의 증가와 같은 많은 문제점들이 발생한다. 한편, 기존의 부유 게이트 타입의 메모리를 대신할 것으로 기대되는 전하 포획형 메모리는 쓰기/지우기 속도를 향상시킬 수 있으며 소자의 축소화에도 셀간 간섭이 일어나지 않으므로 부유 게이트 플래시 메모리를 대체할 수 있는 기술로 주목받고 있다. 특히, TBM (tunnel barrier engineered memory) 소자는 유전율이 큰 절연막을 적층하여 전계에 대한 터널 산화막의 민감도를 증가시키고, 적층된 물리적 두께의 증가에 의해 메모리의 데이터 유지 특성을 크게 개선시킬 수 있는 기술로 관심이 증가하고 있다. 본 연구에서는 Si3N4/Ta2O5를 적층시킨 staggered구조의 tunnel barrier를 제안하였고, Si기판 위에 tunnel layer로 Si3N4를 Low Pressure Chemical Vapor Deposition (LPCVD) 방법과 Ta2O5를 RF Sputtering 방법으로 각각 3/3 nm 증착한 후 e-beam evaporation을 이용하여 게이트 전극으로 Al을 150 nm 증착하여 MIS- capacitor구조의 메모리 소자를 제작하여 동작 특성을 평가하였다. 또한, Si3N4/Ta2O5 staggered tunnel barrier 형성 후의 후속 열처리에 따른 전기적 특성의 개선효과를 확인하였다.