• Journal of KIISE:Computer Systems and Theory
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• v.35 no.6
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• pp.293-303
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• 2008

As the computing environment moves to the wireless and handheld system, the power efficiency is getting more important. That is the case especially in the embedded hand-held system and the power consumed by the memory system takes the second largest portion in overall. To save energy consumed in the memory system we can utilize low power mode of SDRAM. In the case of RDRAM, nap mode consumes less than 5% of the power consumed in active or standby mode. However hardware controller itself can't use this facility efficiently unless the operating system cooperates. In this paper we focus on how to minimize the number of active units of SDRAM. The operating system allocates its physical pages so that only a few units of SDRAM need to be activated and the unnecessary SDRAM can be put into nap mode. This work can be considered as a generalized and system-wide version of PAVM(Power-Aware Virtual Memory) research. We take all the physical memory into account, especially buffer cache, which takes an half of total memory usage on average. Because of the portion of buffer cache and its importance, PAVM approach cannot be robust without taking the buffer cache into account. In this paper, we analyze the RAM usage and propose power-aware page allocation policy. Especially the pages mapped into the process' address space and the buffer cache pages are considered. The relationship and interactions of these two kinds of pages are analyzed and exploited for energy saving.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.305-309
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• 2002

We have successfully fabricated a Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure using Bi$\sub$4-x/La$\sub$x/Ti$_3$O$\sub$12/ (BLT) ferroelectric thin film and SiO$_2$/Nitride/SiO$_2$ (ONO) stacked buffer layers for single transistor type ferroelectric nonvolatile memory applications. BLT films were deposited on 15 nm-thick ONO buffer layer by sol-gel spin-coating. The dielectric constant and the leakage current density of prepared ONO film were measured to be 5.6 and 1.0 x 10$\^$-8/ A/$\textrm{cm}^2$ at 2MV/cm, respectively, It was interesting to note that the crystallographic orientations of BLT thin films were strongly effected by pre-bake temperatures. X-ray diffraction patterns showed that (117) crystallites were mainly detected in the BLT film if pre-baked below 400$^{\circ}C$. Whereas, for the films pre-baked above 500$^{\circ}C$, the crystallites with preferred c-axis orientation were mainly detected. From the C-V measurement of the MFIS capacitor with c-axis oriented BLT films, the memory window of 0.6 V was obtained at a voltage sweep of ${\pm}$8 V, which evidently reflects the ferroelectric memory effect of a BLT/ONO/Si structure.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.10
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• pp.5149-5167
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• 2017

Reducing energy consumption in a wireless video sensor network (WVSN) is a crucial problem because of the high video data volume and severe energy constraints of battery-powered WVSN nodes. In this paper, we present an adaptive dynamic resizing approach for a SRAM communication buffer in a WVSN node in order to reduce the energy consumption and thereby, to maximize the lifetime of the WVSN nodes. To reduce the power consumption of the communication part, which is typically the most energy-consuming component in the WVSN nodes, the radio needs to remain turned off during the data buffer-filling period as well as idle period. As the radio ON/OFF transition incurs extra energy consumption, we need to reduce the ON/OFF transition frequency, which requires a large-sized buffer. However, a large-sized SRAM buffer results in more energy consumption because SRAM power consumption is proportional to the memory size. We can dynamically adjust any active buffer memory size by utilizing a power-gating technique to reflect the optimal control on the buffer size. This paper aims at finding the optimal buffer size, based on the trade-off between the respective energy consumption ratios of the communication buffer and the radio part, respectively. We derive a formula showing the relationship between control variables, including active buffer size and total energy consumption, to mathematically determine the optimal buffer size for any given conditions to minimize total energy consumption. Simulation results show that the overall energy reduction, using our approach, is up to 40.48% (26.96% on average) compared to the conventional wireless communication scheme. In addition, the lifetime of the WVSN node has been extended by 22.17% on average, compared to the existing approaches.

• Journal of the Korean Ceramic Society
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• v.42 no.9 s.280
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• pp.624-630
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• 2005

To investigate the possibility of the $ZrO_2$ buffer layer as the insulator for the Metal-Ferroelectric-Insulator-semiconductor (MFIS) structure, $ZrO_2$ and $SrBi_2Ta_2O_9$ (SBT) thin films were deposited on the P-type Si(111) wafer by the R.F. magnetron-sputtering method. According to the process with and without the post-annealing of the $ZrO_2$ buffer layer and SBT thin film, the diffusion amount of Sr, Bi, Ta elements show slight difference through the Glow Discharge Spectrometer (GDS) analysis. From X-ray Photoelectron Spectroscopy (XPS) results, we could confirm that the post-annealing process affects the chemical binding condition of the interface between the $ZrO_2$ thin film and the Si substrate. Compared to the MFIS structure without the post-annealing of the $ZrO_2$ buffer layer, memory window value of MFlS structure with post-annealing of the $ZrO_2$ buffer layer were considerably improved. The window memory of the Pt/SBT (260 nm, $800^{\circ}C)/ZrO_2$ (20 nm) structure increases from 0.75 to 2.2 V under the applied voltage of 9 V after post-annealing.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.12
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• pp.2202-2211
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• 2006

EXT3NS is a special-purpose file system for large scale multimedia streaming servers. It is built on top of streaming acceleration hardware device called Network-Storage card. The EXT3NS file system significantly improves streaming performance by eliminating memory-to-memory copy operations, i.e. sending video/audio from disk directly to network interface with no main memory buffering. In this paper, we design and implement a buffer cache mechanism, called PMEMCACHE, for EXT3NS file system. We also propose a buffer cache replacement method called ONS for the buffer cache mechanism. The ONS algorithm outperforms other existing buffer replacement algorithms in distributed multimedia streaming environment. In EXT3NS with PMEMCACHE, operation is 33MB/sec and random read operation is 2.4MB/sec. Also, the buffer replacement ONS algorithm shows better performance by 600KB/sec than other buffer cache replacement policies. As a result PMEMCACHE and an ONS can greatly improve the performance of multimedia steaming server which should supportmultiple client requests at the same time.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.4
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• pp.143-148
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• 2017

Flash Memory which is light and strong external shock as storage of small electronics like smartphone, digital camera, car black box has been widely used. Since the operation speed of the read operation and the write operation are different from each other, and the flash memory has the feature that it is not possible to overwrite, the delete operation is added to solve these problems. Wear-leveling must also be considered, since the number of erase times of the flash memory is limited. Many studies have been conducted on the substitutional algorithms of flash memory based on these characteristics of recent flash memories. So, to solve the problem that has existing buffer replacement algorithm this thesis divide page into 6 groups and when proposed algorithm select victim page, it consider reference page frequency and page recency.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.2
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• pp.275-282
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• 2015

Since a NAND-flash memory is able to keep data during electricity-off and has small cost to store data per bytes, it is widely used on hand-held devices. It is necessary to use an index in order to process mass data effectively on the flash memory. However, since the flash memory requires high cost for a write operation and does not support an overwrite operation, it is possible to reduce the performance of the index when the disk based index is exploited. In this paper, we implement the fixed grid file index and evaluate the performance of the index on various conditions. To do this, we measure the average processing time by the ratio of query operations and update operations. We also the compare the processing times of the flash memory with those of the magnetic disk.

• The Journal of the Korea Contents Association
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• v.12 no.1
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• pp.30-37
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• 2012

A memory system with the linear skewing scheme has been regarded as one of suitable memory systems for a single instruction, multiple data (SIMD) architecture. The memory system supports simultaneous access n data to m memory modules within various access types with a constant interval in an arbitrary position in two dimensional data array of $M{\times}N$. Although $m{\times}cells$ memory cells are physically required to support logical two dimensional $M{\times}N$ array of data by means of the memory system, at least (m-n)${\times}cells$ memory cells remain in disuse, where cells is (M-1)/q+(N-1)/$p{\times}{\lceil}M/q{\rceil}+1$. On keeping functionalities the memory system supports, $(n{\times}t){\times}N/p$ out of a number of unused memory cells, where t>0, being used as local buffer memories for n processing elements is proposed in this paper.

• Proceedings of the Korea Contents Association Conference
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• 2009.05a
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• pp.51-56
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• 2009

Flash memory has rapidly deployed as data storage. However, the flash memory has a major disadvantage that recorded data cannot be dynamically overwritten. In order to solve this "erase-before-write" problem, the log block buffer scheme used Flash memory file system. however, the current managements of the log buffer, in case random write pattern, BAST technique have problem of frequent merge operation, but FAST technique don't consider merge operation by frequently updated data. Previous methods not consider merge operation cost and frequently updated data. In this paper, we propose a new log buffer management scheme, called JBB. Our proposed method evaluates the worth of the merge of log blocks, so we conducts the merge operation between infrequently updated data and its data blocks, and postpone the merge operation between frequently updated data and its data blocks. Through the method, we prevent the unnecessary merge operations, reduce the number of the erase operation, and improve the utilization of the flash memory storage. We show the superiority of our proposed method through the performance evaluation with BAST and FAST.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.10
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• pp.24-33
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• 2001

Delay, delay variation and packet loss rate are principal QoS(Quality of Service) elements of packet communication. This paper proposes a new buffer allocation mechanism to improve the packet loss performance in such a situation that multiple logical buffers share a single physical memory buffer. In the proposed buffer allocation mechanism, the movement of dynamic threshold follows a curved track instead of a straight line which is used in the DT(dynamic threshold) mechanism. In order evaluate the effectiveness of the proposed mechanism, it is compared with the existing previously proposed mechanisms in several aspects including NC(no control), ST(Static Threshold) and DT mechanisms.