• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.325-328
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• 2000

The control of the data retention time is a main issue for realizing future high density dynamic random access memory. In this paper, we propose the new implantation scheme by gate-related ion beam shadowing effect and buffer-enhanced $\Delta$ Rp increase using buffered N- implantation with tilt and 4X-rotation that is designed on the basis of the local-field-enhancement model of the tail component. We report an excellent tail improvement of the retention time distribution attributed to the reduction of electric field across the cell junction due to the redistribution of N- concentration which is intentionally caused by Ion Beam Shadowing and Buffering Effect using tilt implantation with 4X-rotation.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.221-224
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• 2000

We have successfully demonstrated metal-ferroel-ectric-insulator-semiconductor (MFIS) devices using Al/LiNbO$_{3}$/SiN/Si structure. The SiN thin films were made into metal -insulator- semiconductor (MIS) devices by thermal evaporation of aluminum source in a dot away on the surface. The interface property of MFIS from 1MHz & quasistatic C-V is good and the memory window width is about 1.5V at 0.2V/s signal voltage sweep rate. The gate leakage current density of MFIS capacitors using a aluminum electrode showed the least value of 1x10$^{-8}$ A/$\textrm{cm}^2$ order at the electric field of 300㎸/cm. And the XRD patterns shows the probability of applications of LN for MFIS devices for FeRAMs on amorphous SiN buffer layer.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.927-930
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• 2003

In this paper, a design of processor IP for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability. To handle the various modes of TCP/IP protocol, hardware and software co-design approach is used rather than the conventional state machine based design. To eliminate delay time due to the data transfer and checksum operation, DAM module which can execute the checksum operation on-the-fly along with data transfer operation is adopted. By programming the on-chip code ROM of RISC processor differently. the designed stack processor can support the packet format conversion operations required in the various TCP/IP protocols.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.679-682
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• 1999

This paper proposes the LSF or LSP that is the method of using to transfer the speech parameters after processed the speech to LPC, which is digital coding transferring efficiently, for the best quality and the lowest bit rate of parameters. The new revised transform algorithm between LSF and LPC coefficients is proposed. The proposed algorithm eliminates all multiplications, computes fewer operations, and reduces memory buffer sizes.

• JSTS:Journal of Semiconductor Technology and Science
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• 제3권4호
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• pp.175-180
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• 2003

In this paper, we present a new method for early depth test for a 3D rendering engine. We add a filter stage to the rasterizer in the 3D rendering engine, in an attempt to identify and avoid the occluded pixels. This filtering block determines if a pixel is hidden by a certain plane. If a pixel is hidden by the plane, it can be removed. The simulation results show that the filter reduces the number of pixels to the next stage up to 71.7%. As a result, 67% of memory bandwidth is saved with simple extra hardware.

• Journal of Advanced Marine Engineering and Technology
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• 제22권6호
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• pp.894-900
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• 1998

In this paper, a communication method is proposed for the development of a main engine remote control system. The main engine control system compriese three subsystems such as RCS (Remote Control System) BCS (Bridge Control System) and SS (Safety System), Thus it is required to exchange data each other among these subsystems. The communication method has simplified hardware through the minimization of communication components where the interrupt method are employed for receiving and the polling method for transmitting. We discuss a methodology of using a ring buffer for data storage physically which has two buffers virtually for the effective use of memory. This communication method presents a good performance in the system which has rather small numbers of communication data.

• 한국통신학회논문지
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• 제12권2호
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• pp.102-114
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• 1987

本 論文에서는 ISDN 遠隔 加入者와 交換局間의 返送裝置 開發에 따른 基本硏究로써 11個의 ISDN 基本接燭(2B+D)을 多重化시켜 64Kbps 또는 128Kbps에 該當하는 情報量으로 多重化한 후 다시 22個의 B채널과 함께 多重化하여 기존의 T1返送裝置를 통해 傳送시킴으로써 ISDN과 접속하는 方案을 提案하고, 이에 따른 統計的 多重化器(SMUX; Statistical Multiplexer)의 하드웨어 및 소프트웨어 實現에 對해 硏究하였다. 또한 開發된 統計的 多重化器에 對한 性能 試驗結果를 提示하였으며, 이의 改善方向에 對해 檢討하였다.

• 대한전자공학회논문지
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• 제24권5호
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• pp.849-855
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• 1987

This paper describes an implementation of the absolute moment block truncation coding(AMBTC) in real time for the moving picture data compression. We have realized a system composed of the encoder and decoder, and operated it using an NTSC TV signal. The encoder consists of a 4-1line buffer memory and a data processing block. Besides, there are signal conditioner and a control signal generator. Experimental results show that the quality of the processed image with a data rate of 10Mb/s is slightly degraded, but not objectionable, comparing data rate of 80Mb/s.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권2호
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• pp.114-126
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• 2013

In this paper, we present a set of methodologies to model the electromagnetic susceptibility (EMS) testing of I/O buffers for mobile system memory based on the bulk current injection (BCI) method. An efficient equivalent circuit model is developed for the current injection probe, line impedance stabilization network (LISN), printed circuit board (PCB), and package. The simulation results show good correlation with the measurements and thus, the work presented here will enable electromagnetic susceptibility analysis at the integrated circuit (IC) design stage.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(I)
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• pp.61-63
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• 1987

In this paper, we develope a system which can perform signal processing for bar-code laser scanner. This system is composed of optical detector and preprocessor. The former detects the diffused light and converts it into TTL lebel output. The latter discriminator valid data from various raw data and transmits data to micro-processor. The preprocessor consists of edge transition detector, latch signal generator, module counter, register array, adder array, and buffer memory control circuit etc..