• Title/Summary/Keyword: Matrix decoder

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Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX (IEEE 802.16e WiMAX용 부호율 1/2, 2304-비트 LDPC 복호기)

  • Kim, Hae-Ju;Shin, Kyung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.4A
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    • pp.414-422
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    • 2011
  • This paper describes a design of low-density parity-check(LDPC) decoder supporting block length 2,304-bit and code rate 1/2 of IEEE 802.16e mobile WiMAX standard. The designed LDPC decoder employs the min-sum algorithm and partially parallel layered-decoding architecture which processes a sub-matrix of $96{\times}96$ in parallel. By exploiting the properties of the min-sum algorithm, a new memory reduction technique is proposed, which reduces check node memory by 46% compared to conventional method. Functional verification results show that it has average bit-error-rate(BER) of $4.34{\times}10^{-5}$ for AWGN channel with Fb/No=2.1dB. Our LDPC decoder synthesized with a $0.18{\mu}m$ CMOS cell library has 174,181 gates and 52,992 bits memory, and the estimated throughput is about 417 Mbps at 100-MHz@l.8-V.

An analysis of the effects of LLR approximation on LDPC decoder performance (LLR 근사화에 따른 LDPC 디코더의 성능 분석)

  • Na, Yeong-Heon;Jeong, Sang-Hyeok;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.405-409
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    • 2009
  • In this paper, the effects of LLR (Log-Likelihood Ratio) approximation on LDPC (Low-Density Parity-Check) decoder performance are analyzed, and optimal design conditions of LDPC decoder are derived. The min-sum LDPC decoding algorithm which is based on an approximation of LLR sum-product algorithm is modeled and simulated by MATLAB, and it is analyzed that the effects of LLR approximation bit-width and maximum iteration cycles on the bit error rate (BER) performance of LDCP decoder. The parity check matrix for IEEE 802.11n standard which has block length of 1,944 bits and code rate of 1/2 is used, and AWGN channel with QPSK modulation is assumed. The simulation results show that optimal BER performance is achieved for 7 iteration cycles and LLR bit-width of (7,5).

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A LDPC Decoder for DVB-S2 Standard Supporting Multiple Code Rates (DVB-S2 기반에서 다양한 부호화 율을 지원하는 LCPC 복호기)

  • Ryu, Hye-Jin;Lee, Jong-Yeol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.118-124
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    • 2008
  • For forward error correction, DVB-S2, which is the digital video broadcasting forward error coding and modulation standard for satellite television, uses a system based the concatenation of BCH with LDPC inner coding. In DVB-S2 the LDPC codes are defined for 11 different code rates, which means that a DVB-S2 LDPC decoder should support multiple code rates. Seven of the 11 code rates, 3/5, 2/3, 3/4, 4/5, 5/6, 8/9, and 9/10, are regular and the rest four code rates, 1/4, 1/3, 2/5, and 1/2, are irregular. In this paper we propose a flexible decoder for the regular LDPC codes. We combined the partially parallel decoding architecture that has the advantages in the chip size, the memory efficiency, and the processing rate with Benes network to implement a DVB-S2 LDPC decoder that can support multiple code rates with a block size of 64,800 and can configure the interconnection between the variable nodes and the check nodes according to the parity-check matrix. The proposed decoder runs correctly at the frequency of 200MHz enabling 193.2Mbps decoding throughput. The area of the proposed decoder is $16.261m^2$ and the power dissipation is 198mW at a power supply voltage of 1.5V.

Efficient Design of Structured LDPC Codes (구조적 LDPC 부호의 효율적인 설계)

  • Chung Bi-Woong;Kim Joon-Sung;Song Hong-Yeop
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.1C
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    • pp.14-19
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    • 2006
  • The high encoding complexity of LDPC codes can be solved by designing structured parity-check matrix. If the parity-check matrix of LDPC codes is composed of same type of blocks, decoder implementation can be simple, this structure allow structured decoding and required memory for storing the parity-check matrix can be reduced largely. In this parer, we propose a construction algorithm for short block length structured LDPC codes based on girth condition, PEG algorithm and variable node connectivity. The code designed by this algorithm shows similar performance to other codes without structured constraint in low SNR and better performance in high SNR than those by simulation

Channel Coding Based Physical Layer Security for Wireless Networks (채널 부호화를 통한 물리계층 무선네트워크 보안기술)

  • Asaduzzaman, Asaduzzaman;Kong, Hyung Yun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.8 no.3
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    • pp.57-70
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    • 2008
  • This paper introduces a new paradigm of physical layer security through channel coding for wireless networks. The well known spread spectrum based physical layer security in wireless network is applicable when code division multiple access (CDMA) is used as wireless air link interface. In our proposal, we incorporate the proposed security protocol within channel coding as channel coding is an essential part of all kind of wireless communications. Channel coding has a built-in security in the sense of encoding and decoding algorithm. Decoding of a particular codeword is possible only when the encoding procedure is exactly known. This point is the key of our proposed security protocol. The common parameter that required for both encoder and decoder is generally a generator matrix. We proposed a random selection of generators according to a security key to ensure the secrecy of the networks against unauthorized access. Therefore, the conventional channel coding technique is used as a security controller of the network along with its error correcting purpose.

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8 Antenna Polar Switching Up-Down Relay Networks

  • Li, Jun;Lee, Moon-Ho;Yan, Yier;Peng, Bu Shi;Hwang, Gun-Joon
    • Journal of electromagnetic engineering and science
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    • v.11 no.4
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    • pp.239-249
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    • 2011
  • In this paper, we propose a reliable $8{\times}8$ up-down switching polar relay code based on 3GPP LTE standard, motivated by 3GPP LTE down link, which is 30 bps/Hz for $8{\times}8$ MIMO antennas, and by Arikan's channel polarization for the frequency selective fading (FSF) channels with the generator matrix $Q_8$. In this scheme, a polar encoder and OFDM modulator are implemented sequentially at both the source node and relay nodes, the time reversion and complex conjugation operations are separately implemented at each relay node, and the successive interference cancellation (SIC) decoder, together with the cyclic prefix (CP) removal, is performed at the destination node. Use of the scheme shows that decoding at the relay without any delay is not required, which results in a lower complexity. The numerical result shows that the system coded by polar codes has better performance than currently used designs.

Simplified MMSE Detection with SoIC for Iterative Receivers in Multiple Antenna Systems (다중 안테나 시스템에서 연 간섭 제거를 이용한 저 복잡도 MMSE 신호 검출 방법)

  • Kim, Jong-Kyung;Seo, Jong-Soo
    • Journal of Advanced Navigation Technology
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    • v.13 no.3
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    • pp.385-392
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    • 2009
  • Simplified minimum mean square error (MMSE) detection technique combined with soft interference cancellation(SoIC) is proposed for iterative receivers in multiple antenna systems. To avoid repeated matrix inversions required to obtain the MMSE filter coefficients during the iteration between the soft detector and decoder, simplified matrix inversion techniques are applied to calculate the filter coefficient matrix. Simulation results show that the proposed MMSE detections with SoIC indicate a comparable or slightly degraded detection performance while achieving a significantly reduced complexity as compared to the conventional MMSE detection with SoIC.

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Spectral encapsulation of OFDM systems based on orthogonalization for short packet transmission

  • Kim, Myungsup;Kwak, Do Young;Kim, Ki-Man;Kim, Wan-Jin
    • ETRI Journal
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    • v.42 no.6
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    • pp.859-871
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    • 2020
  • A spectrally encapsulated (SE) orthogonal frequency-division multiplexing (OFDM) precoding scheme for wireless short packet transmission, which can suppress the out-of-band emission (OoBE) while maintaining the advantage of the cyclic prefix (CP)-OFDM, is proposed. The SE-OFDM symbol consists of a prefix, an inverse fast Fourier transform (IFFT) symbol, and a suffix generated by the head, center, and tail matrices, respectively. The prefix and suffix play the roles of a guard interval and suppress the OoBE, and the IFFT symbol has the same size as the discrete Fourier transform symbol in the CP-OFDM symbol and serves as an information field. Specifically, as the center matrix generating the IFFT symbol is orthogonal, data and pilot symbols can be allocated to any subcarrier without distinction. Even if the proposed precoder is required to generate OFDM symbols with spectral efficiency in the transmitter, a corresponding decoder is not required in the receiver. The proposed scheme is compared with CP-OFDM in terms of spectrum, OoBE, and bit-error rate.

A Variable Rate LDPC Coded V-BLAST System (가변 부호화 율을 가지는 LDPC 부호화된 V-BLAST 시스템)

  • Noh, Min-Seok;Kim, Nam-Sik;Park, Hyun-Cheol
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.55-58
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    • 2004
  • This this paper, we propose vertical Bell laboratories layered space time (V-BLAST) system based on variable rate Low-Density Parity Check (LDPC) codes to improve performance of receiver when QR decomposition interference suppression combined with interference cancellation is used over independent Rayleigh fading channel. The different rate LDPC codes can be made by puncturing some rows of a given parity check matrix. This allows to implement a single encoder and decoder for different rate LDPC codes. The performance can be improved by assigning stronger LDPC codes in lower layer than upper layer because the poor SNR of first detected data streams makes error propagation. Keeping the same overall code rates, the V-BLAST system with different rate LDPC codes has the better performance (in terms of Bit Error Rate) than with constant rate LDPC code in fast fading channel.

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A Two-Step Soft Output Viterbi Algorithm with Algebraic Structure (대수적 구조를 가진 2단 연판정 출력 비터비 알고리듬)

  • 김우태;배상재;주언경
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12A
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    • pp.1983-1989
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    • 2001
  • A new two-step soft output Viterbi algorithm (SOVA) for turbo decoder is proposed and analyzed in 7his paper. Due to the algebraic structure of the proposed algorithm, slate and branch metrics can be obtained wish parallel processing using matrix arithmetic. As a result, the number of multiplications to calculate state metrics of each stage and total memory size can be decreased tremendously. Therefore, it can be expected that the proposed algebraic two-step SOVA is suitable for applications in which low computational complexity and memory size are essential.

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