• Title/Summary/Keyword: Matching cost

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Robust Depth Map Estimation of Anaglyph Images (애너글리프 영상을 이용한 깊이 영상 취득 기법)

  • Williem, Williem;Park, In Kyu
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2014.06a
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    • pp.133-134
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    • 2014
  • Conventional stereo matching algorithms fail when they deal with anaglyph image as its input because anaglyph image does not have similar intensity on both view images. To ameliorate such problems, we propose a robust method to obtain accurate disparity maps. The novel Absolute Adaptive Normalized Cross Correlation (AANCC) for anaglyph data cost is introduced in this paper. Then, it is followed by occlusion detection and segmentation-based plane fitting to achieve accurate depth map acquisition. Experimental results confirm that the proposed anaglyph data cost is robust and gives accurate disparity maps.

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Dynamically equivalent element for an emboss embedded in a plate (평판의 국부적인 기하학적 변형을 모사하는 등가 요소 생성)

  • Song, Kyung-Ho;Park, Youn-Sik
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2002.11b
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    • pp.301-305
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    • 2002
  • Among many structural dynamics modification methods for plate and shell vibration problems, embedding an emboss to the surface is very efficient. But deciding an optimal position and shape using optimization algorithm needs defining geometry and remeshing the model for every iteration step to implement the method, which takes much numerical cost. An equivalent element produced here lessen the cost by representing the geometrical characteristics of an emboss using the element's material properties and thickness becoming a geometrically homogenous element of the base plate or shell. Some efficient factors which let the equivalent system have the same dynamical response as the original system embedded with emboss will be shown and the degree of equivalence will be tested in terms of natural frequency matching.

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A VLSI architecture for fast motion estimation algorithm (고속 움직임 추정 알고리즘에 적합한 VLSI 구조 연구)

  • 이재헌;라종범
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.717-720
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    • 1998
  • In this paper, we propose a VLSI architecture for implementing a crecently proposed fast block matching algorithm, which is called the HSBMA3S. The proposed architecture consists of a systolic array based basic unit and two shift register arrays. And it covers a search range of -32 ~+31. By using a basic unit repeatedly, we can redcue the number of gates. To implement the basic unit, we can select one among various conventional systolic arrays by trading-off between speed and hardware cost. In this paper, the architecture for the basic unit is selected so that the hardware cost can be minimized. The proposed architecture is fast enough for low bit-rate applications (frame size of 352x288, 30 frames/sec) and can be implemented by less than 20,000 gates. Moreover, by simply modifying the basic unit, the architecture can be used for the higher bit-rate application of the frame size of 720*480 and 30 frames/sec.

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Design of an Automatic Synthesis System for Datapaths Based on Multiport Memories (다중포트 메모리를 지원하는 데이터패스 자동 합성 시스템의 설계)

  • 이해동;김용노;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.7
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    • pp.117-124
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    • 1994
  • In this pape, we propose a graph-theoretic approach for solving the allocation problem for the synthesis of datapaths based on multiport memories. An efficient algorithm is devised by using the weighted bipartite matching algorithm to assign variables to each port of memory modules. The proposed algorithm assigns program variables into a minimum number of multiport memory modules such that usage of memory elements and interconnection cost can be kept minimal. Experimental results show that the proposed algorithm generates the datapaths with fewer registers in memory modules and less interconnection cost for several benchmarks available from the literatures.

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Determination of Cost Function in Disparity Space Image (변이공간영상에서의 비용 함수의 결정)

  • Park, Jun-Hee;Lee, Byung-Uk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.5C
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    • pp.530-535
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    • 2007
  • Disparity space image (DSI) technique is a method of establishing correspondence between a pair of images. It has a merit of generating a dense disparity map for each pixel. DSI has a cost function to be minimized, and it needs empirical weighting factors for occlusion penalty and match reward. This paper provides theoretical basis for the weighting factors, which depend on image noise and contrast between an object and background.

Gaussian Approximation of Stochastic Lanchester Model for Heterogeneous Forces (혼합 군에 대한 확률적 란체스터 모형의 정규근사)

  • Park, Donghyun;Kim, Donghyun;Moon, Hyungil;Shin, Hayong
    • Journal of Korean Institute of Industrial Engineers
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    • v.42 no.2
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    • pp.86-95
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    • 2016
  • We propose a new approach to the stochastic version of Lanchester model. Commonly used approach to stochastic Lanchester model is through the Markov-chain method. The Markov-chain approach, however, is not appropriate to high dimensional heterogeneous force case because of large computational cost. In this paper, we propose an approximation method of stochastic Lanchester model. By matching the first and the second moments, the distribution of each unit strength can be approximated with multivariate normal distribution. We evaluate an approximation of discrete Markov-chain model by measuring Kullback-Leibler divergence. We confirmed high accuracy of approximation method, and also the accuracy and low computational cost are maintained under high dimensional heterogeneous force case.

A Method of Image Identification in Instrumentation

  • Wang, Xiaoli;Wang, Shilin;Jiang, Baochen
    • Journal of Information Processing Systems
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    • v.14 no.3
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    • pp.600-606
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    • 2018
  • Smart city is currently the main direction of development. The automatic management of instrumentation is one task of the smart city. Because there are a lot of old instrumentation in the city that cannot be replaced promptly, how to makes low-cost transformation with Internet of Thing (IoT) becomes a problem. This article gives a low-cost method that can identify code wheel instrument information. This method can effectively identify the information of image as the digital information. Because this method does not require a lot of memory or complicated calculation, it can be deployed on a cheap microcontroller unit (MCU) with low read-only memory (ROM). At the end of this article, test result is given. Using this method to modify the old instrumentation can achieve the automatic management of instrumentation and can help build a smart city.

Design of a Wide-Frequency-Range, Low-Power Transceiver with Automatic Impedance-Matching Calibration for TV-White-Space Application

  • Lee, DongSoo;Lee, Juri;Park, Hyung-Gu;Choi, JinWook;Park, SangHyeon;Kim, InSeong;Pu, YoungGun;Kim, JaeYoung;Hwang, Keum Cheol;Yang, Youngoo;Seo, Munkyo;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.1
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    • pp.126-142
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    • 2016
  • This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal $S_{22}$ and $S_{11}$ matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in $0.13{\mu}m$, 1-poly, 6-metal CMOS technology. The die area of the transceiver is $4mm{\times}3mm$. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is +10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.

An Efficient Sequence Matching Method for XML Query Processing (XML 질의 처리를 위한 효율적인 시퀀스 매칭 기법)

  • Seo, Dong-Min;Song, Seok-Il;Yoo, Jae-Soo
    • Journal of KIISE:Databases
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    • v.35 no.4
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    • pp.356-367
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    • 2008
  • As XML is gaining unqualified success in being adopted as a universal data representation and exchange format, particularly in the World Wide Web, the problem of querying XML documents poses interesting challenges to database researcher. Several structural XML query processing methods, including XISS and XR-tree, for past years, have been proposed for fast query processing. However, structural XML query processing has the problem of requiring expensive Join cost for twig path query Recently, sequence matching based XML query processing methods, including ViST and PRIX, have been proposed to solve the problem of structural XML query processing methods. Through sequence matching based XML query processing methods match structured queries against structured data as a whole without breaking down the queries into sub queries of paths or nodes and relying on join operations to combine their results. However, determining the structural relationship of ViST is incorrect because its numbering scheme is not optimized. And PRIX requires many processing time for matching LPS and NPS about XML data trees and queries. Therefore, in this paper, we propose efficient sequence matching method u sing the bottom-up query processing for efficient XML query processing. Also, to verify the superiority of our index structure, we compare our sequence matching method with ViST and PRIX in terms of query processing with linear path or twig path including wild-card('*' and '//').

Optimal Construction of Multiple Indexes for Time-Series Subsequence Matching (시계열 서브시퀀스 매칭을 위한 최적의 다중 인덱스 구성 방안)

  • Lim, Seung-Hwan;Kim, Sang-Wook;Park, Hee-Jin
    • Journal of KIISE:Databases
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    • v.33 no.2
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    • pp.201-213
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    • 2006
  • A time-series database is a set of time-series data sequences, each of which is a list of changing values of the object in a given period of time. Subsequence matching is an operation that searches for such data subsequences whose changing patterns are similar to a query sequence from a time-series database. This paper addresses a performance issue of time-series subsequence matching. First, we quantitatively examine the performance degradation caused by the window size effect, and then show that the performance of subsequence matching with a single index is not satisfactory in real applications. We argue that index interpolation is fairly useful to resolve this problem. The index interpolation performs subsequence matching by selecting the most appropriate one from multiple indexes built on windows of their inherent sizes. For index interpolation, we first decide the sites of windows for multiple indexes to be built. In this paper, we solve the problem of selecting optimal window sizes in the perspective of physical database design. For this, given a set of query sequences to be peformed in a target time-series database and a set of window sizes for building multiple indexes, we devise a formula that estimates the cost of all the subsequence matchings. Based on this formula, we propose an algorithm that determines the optimal window sizes for maximizing the performance of entire subsequence matchings. We formally Prove the optimality as well as the effectiveness of the algorithm. Finally, we perform a series of extensive experiments with a real-life stock data set and a large volume of a synthetic data set. The results reveal that the proposed approach improves the previous one by 1.5 to 7.8 times.