• 제목/요약/키워드: MONOS

검색결과 24건 처리시간 0.027초

저전압 EEPROM을 위한 Scaled MONOS 비휘발성 기억소자의 제작 및 특성에 관한 연구 (A study on the fabrication and characteristics of the scaled MONOS nonvolatile memory devices for low voltage EEPROMs)

  • 이상배;이상은;서광열
    • E2M - 전기 전자와 첨단 소재
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    • 제8권6호
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    • pp.727-736
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    • 1995
  • This paper examines the characteristics and physical properties of the scaled MONOS nonvolatile memory device for low programming voltage EEPROM. The capacitor-type MONOS memory devices with the nitride thicknesses ranging from 41.angs. to 600.angs. have been fabricated. As a result, the 5V-programmable MONOS device has been obtained with a 20ms programming time by scaling the nitride thickness to 57.angs. with a tunneling oxide thickness of 19.angs. and a blocking oxide thickness of 20.angs.. Measurement results of the quasi-static C-V curves indicate, after 10$\^$6/ write/erase cycles, that the devices are degraded due to the increase of the silicon-tunneling oxide interface traps. The 10-year retention is impossible for the device with a nitride less than 129.angs.. However, the MONOS memory device with 10-year retentivity has been obtained by increasing the blocking oxide thickness to 47.angs.. Also, the memory traps such as the nitride bulk trap and the blocking oxide-nitride interface trap have been investigated by measuring the maximum flatband voltage shift and analyzing through the best fitting method.

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초박막 GNO 구조의 TDDB 특성에 관한 연구 (A Study on the TDDB Characteristics of Superthin ONO structure)

  • 국삼경;윤성필;이상은;김선주;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1997년도 추계학술대회 논문집
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    • pp.25-29
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    • 1997
  • Capacitor-type MONOS (metal-oxide-nitride-oxide- semiconductor) NVSMs with 23$\AA$ tunneling oxide and 40$\AA$ blocking oxide were fabricated. The thicknesses of nitride layer were 45$\AA$, 91$\AA$ and 223$\AA$, Breakdown characteristics of MONOS devices were measured to investigate the reliability of superthin ONO structure using ramp voltage and constant voltage method. Reducing the nitride thickness will significantly increase the reliablity of MONOS NVSM.

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5V-Programmable E$^2$PROM을 위한 비휘발성 MONOS 기억소자의 Scale-down (scale-down of the Nonvolatile MONOS Memory Devices for the 5V-Programmable E$^2$PROM)

  • 이상배;이상은;김선주;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1994년도 추계학술대회 논문집
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    • pp.33-36
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    • 1994
  • The characteristics of the nonvolatile MONOS memory devices as the nitride thickness is scaled down while maintaining constant tunneling oxide thickness and blocking oxide thickness have been investigated in order to obtain the 5V-programmable E$^2$PROM. We have found that 1V memory window for a 5V programming voltage and 10 year data retention can be achieved in the scaled MONOS memory devices with a 50 blocking oxide, a 57 nitride and a 19 tunneling oxide.

Scale-down EEPROM을 위한 MONOS 구조의 기억특성에 관한 연굴 (A Study on the Memory Characteristics of MONOS Structure for the Scale-down EEPROM)

  • 이상배;김주열;이상은;김선주;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1994년도 춘계학술대회 논문집
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    • pp.127-129
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    • 1994
  • For scale-down EEPROM, MONOS structures with the different thicknesses of gate insulators, are fabricated and the memory characteristics, such as swtching and retention characteristics are investigated. As a results, the devices with the top oxide of 20A thick were deteriorated in retentivity. However, 11V-programmable voltage for ΔV$\sub$FB/=4V and 10-year data retention were achieved in MONOS structure with the t7p oxide of 50 ${\AA}$ thick and nitride 45${\AA}$thick.

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MONOS 플래시 메모리의 Nitride 트랩 분석 (Analysis of Nitride traps in MONOS Flash Memory)

  • 양승동;윤호진;김유미;김진섭;엄기윤;채성원;이희덕;이가원
    • 전자공학회논문지
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    • 제52권8호
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    • pp.59-63
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    • 2015
  • 본 연구에서는 MONOS 플래시 메모리의 blocking oxide/trapping nitride, trapping nitride/tunneling oxide 계면 트랩을 구하기 위해 C-V 방법을 도입하였고, stoichiometric 조건을 만족하는 nitride와 silicon rich nitride를 trapping layer로 갖는 MONOS capacitor를 제작하여 각각의 interface trap 특성을 비교분석하였다. 보고에 따르면 silicon rich nitride는 stoichiometric nitride에 비해 다수의 shallow trap이 존재한다고 보고되고 있는데, 본 연구를 통해 이의 정량화가 가능함을 보였다.

실리콘/수소/질소의 결합에 따른 MONOS 커패시터의 계면 특성 연구 (Interface Traps Analysis as Bonding of The Silicon/Nitrogen/Hydrogen in MONOS Capacitors)

  • 김희동;안호명;서유정;장영걸;남기현;정홍배;김태근
    • 대한전자공학회논문지SD
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    • 제46권12호
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    • pp.18-23
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    • 2009
  • 본 연구는 실리콘 기판과 실리콘 산화막 사이의 계면 트랩 밀도와 게이트 누설 전류를 조사하여, Metal-Oxide-Nitride-Oxide-Silicon (MONOS) 메모리 소자의 계면 트랩 특성의 수소-질소 열처리 효과를 조사하였다. 고속열처리 방법으로 850도에서 30초 동안 열처리한 MONOS 샘플들을 질소 가스와 수소-질소 혼합 가스를 사용하여 450도에서 30분 동안추가 퍼니스 열처리 공정을 수행하였다. 열처리 하지 않은 것, 질소, 수소-질소로 열처리 한 세 개의 샘플 중에서, 커패시터-전압 측정 결과로부터 수소-질소 열처리 샘플들이 가장 적은 계면 트랩 밀도를 갖는 것을 확인하였다. 또한, 전류-전압 측정 결과에서, 수소-질소 열처리 소자의 누설전류 특성이 개선되었다. 위의 실험 결과로부터, 수소-질소 혼합 가스로 추가 퍼니스 열처리의해 실리콘 기판과 산화막 사이의 계면 트랩 밀도를 상당히 줄일 수 있었다.

Ge-MONOS 구조를 가진 플레쉬 메모리 소자의 프로그래밍 전압에 따른 문턱 전압 관찰 (Variation of Threshold Voltage by Programming Voltage Change of a Flash Memory Device with Ge-MONOS)

  • 오종혁;유윤섭
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2019년도 춘계학술대회
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    • pp.323-324
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    • 2019
  • Ge-MONOS(Metal-Oxide-Nitride-Oxide-Silicon) 구조를 가진 플레쉬 메모리 소자에 대해 프로그래밍 전압에 따른 문턱 전압의 변화를 조사했다. 프로그래밍 전압은 10V, 12V, 15V, 16V, 17V을 인가하였고 1초 동안 프로그래밍을 진행했다. 10V에서 12V까지는 문턱전압은 약 0.5V로 프로그램 전과 크게 다르지 않고, 15V, 16V, 17V에서 문턱전압이 각각 1.25V, 2.01V, 3.84V로 프로그램 전과 0.75V, 1.49V, 3.44V 차이가 발생했다.

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Scaled MONOS 비휘발성 기억소자의 스위칭 특성 (Switching characteristics of the Scaled MONOS Nonvolatile Memory Devices)

  • 이상배;김선주;이성배;강창수;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 춘계학술대회 논문집
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    • pp.54-57
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    • 1995
  • This study is to investigate the switching charac-teritics in the5V-programmable scaled MONOS nonvolatile memory devices, Modified Folwer-Nordheim tunneling mechanism become important when the electric field in the tunneling oxide is 6 MV/cm for E$\_$OT/ <6MV/cm the trap-assisted tunneling mechanism is dominant, The density of nitride bulk trap is found to be N$\_$T/=7.7${\times}$10$\^$18/ cm$\^$-3/ and the energy level of trap is determined to be ø$\_$T/=0.65 eV.

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MONOS 구조의 트랩특성 조사를 위한 열자극전류 측정 (Measurements of the Thermally Stimulated Currents for Investigation of the Trap Characteristics in MONOS Structures)

  • 이상배;김주연;김선주;이성배;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 추계학술대회 논문집
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    • pp.58-62
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    • 1995
  • Thermally stimulated currents have been measured to investigate the trap characteristics of the MONOS structures with the tunneling oxide layer of 27${\AA}$ thick nitride layer of 73${\AA}$ thick and blocking oxide layer of 40${\AA}$ thick. By changing the write-in voltage and the write-in temperature, peaks of the I-T characteristic curve due to the nitride bulk traps and the blocking oxide-nitride interface traps ware separated from each other experimentally. The results indicate that the nitride bulk traps are distributed spatially at a single energy level and the blocking oxide-nitride interface traps are distributed energetically at interface.

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Scaled MONOS 비휘발성 반도체 기억소자의 기억트랩 조사 (Investigation on the Memory Traps in the Scaled MONOS Nonvolatile Semoconductor Memory Devices)

  • 이상은;김선주;이상배;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1994년도 추계학술대회 논문집
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    • pp.46-49
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    • 1994
  • In this paper we investigate the characteristics of switching and memory traps in sealed MONOS nonvolatile memory devices with different nitride thicknesses. We have demonttrated flatband voltage shift of 1V with 5V programming voltage. By fitting the experimental observations with theoretical calculations, trap density and capture cross section of memory trap at the nitride-blocking oxide interface are estimated to be 1.0${\times}$10$\^$13/ cm$\^$-2/ and 8.0${\times}$10$\^$14/ cm$\^$-2/